SNVS125D March   1998  – May 2016 LM2598

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics - 3.3-V Version
    6. 7.6  Electrical Characteristics - 5-V Version
    7. 7.7  Electrical Characteristics - 12-V Version
    8. 7.8  Electrical Characteristics - Adjustable Voltage Version
    9. 7.9  Electrical Characteristics - All Output Voltage Versions
    10. 7.10 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 SHUTDOWN and Soft-Start
      2. 8.3.2 Inverting Regulator
      3. 8.3.3 Undervoltage Lockout
      4. 8.3.4 Negative Voltage Charge Pump
    4. 8.4 Device Functional Modes
      1. 8.4.1 Discontinuous Mode Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Soft-Start Capacitor (CSS)
      2. 9.1.2 Delay Capacitor (CDELAY)
      3. 9.1.3 Feedforward Capacitor (CFF)
      4. 9.1.4 Input Capacitor (CIN)
      5. 9.1.5 Output Capacitor (COUT)
      6. 9.1.6 Catch Diode
      7. 9.1.7 Inductor Selection
      8. 9.1.8 Output Voltage Ripple and Transients
      9. 9.1.9 Open Core Inductors
    2. 9.2 Typical Application
      1. 9.2.1 LM2598 Fixed Output Series Buck Regulator
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Inductor Selection (L1)
          2. 9.2.1.2.2 Output Capacitor Selection (COUT)
          3. 9.2.1.2.3 Catch Diode Selection (D1)
          4. 9.2.1.2.4 Input Capacitor (CIN)
        3. 9.2.1.3 Application Curves
      2. 9.2.2 LM2598 Adjustable Output Series Buck Regulator
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Programming Output Voltage
          2. 9.2.2.2.2 Inductor Selection (L1)
          3. 9.2.2.2.3 Output Capacitor Selection (COUT)
          4. 9.2.2.2.4 Feedforward Capacitor (CFF)
          5. 9.2.2.2.5 Catch Diode Selection (D1)
          6. 9.2.2.2.6 Input Capacitor (CIN)
        3. 9.2.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
Maximum supply voltage, VIN 45 V
SD/SS pin input voltage(3) 6 V
Delay pin voltage(3) 1.5 V
Flag pin voltage –0.3 45 V
Feedback pin voltage –0.3 25 V
Output voltage to ground (steady state) –1 V
Power dissipation Internally limited
Lead temperature KTW package Vapor phase (60 s) 215 °C
Infrared (10 s) 245
NDZ package (soldering, 10 s) 260
Maximum junction temperature 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.
(3) Voltage internally clamped. If clamp voltage is exceeded, limit current to a maximum of 1 mA.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)(2) ±2000 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) The human body model is a 100-pF capacitor discharged through a 1.5k resistor into each pin.

7.3 Recommended Operating Conditions

MIN MAX UNIT
Supply voltage 4.5 40 V
Temperature –25 125 °C

7.4 Thermal Information

THERMAL METRIC(1) LM2598 UNIT
KTW (TO-263) NDZ (TO-220)
7 PINS 7 PINS
RθJA Junction-to-ambient thermal resistance(2)(3) See(4) — 50 °C/W
See(5) 50 —
See(6) 30 —
See(7) 20 —
RθJC(top) Junction-to-case (top) thermal resistance 2 2 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) The package thermal impedance is calculated in accordance to JESD 51-7.
(3) Thermal Resistances were simulated on a 4 -layer, JEDEC board.
(4) Junction to ambient thermal resistance (no external heat sink) for the package mounted TO-220 package mounted vertically, with the leads soldered to a printed circuit board with (1 oz.) copper area of approximately 1 in2.
(5) Junction to ambient thermal resistance with the TO-263 package tab soldered to a single sided printed circuit board with 0.5 in2 of (1 oz.) copper area.
(6) Junction to ambient thermal resistance with the TO-263 package tab soldered to a single sided printed circuit board with 2.5 in2 of (1 oz.) copper area.
(7) Junction to ambient thermal resistance with the TO-263 package tab soldered to a double sided printed circuit board with 3 in2 of (1 oz.) copper area on the LM2598S side of the board, and approximately 16 in2 of copper on the other side of the PCB.

7.5 Electrical Characteristics – 3.3-V Version

Specifications are for TJ = 25°C, unless otherwise specified.
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX (1) UNIT
SYSTEM PARAMETERS(3) (see Figure 42 and Figure 45 for test circuits)
VOUT Output voltage 4.75 V ≤ VIN ≤ 40 V,
0.1 A ≤ ILOAD ≤ 1 A		 TJ = 25°C 3.168 3.3 3.432 V
Over full operating temperature range 3.135 3.465
η Efficiency VIN = 12 V, ILOAD = 1 A 78%
(1) All room temperature limits are 100% production tested. All limits at temperature extremes are specified via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely norm.
(3) External components such as the catch diode, inductor, input and output capacitors can affect switching regulator system performance. When the LM2598 is used as shown in the Figure 42 and Figure 45, system performance is as shown in system parameters of Electrical Characteristics.

7.6 Electrical Characteristics – 5-V Version

Specifications are for TJ = 25°C, unless otherwise specified.
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
SYSTEM PARAMETERS(3) (see Figure 42 and Figure 45 for test circuits)
VOUT Output voltage 7 V ≤ VIN ≤ 40 V,
0.1 A ≤ ILOAD ≤ 1 A		 TJ = 25°C 4.8 5 5.2 V
Over full operating temperature range 4.75 5.25
η Efficiency VIN = 12 V, ILOAD = 1 A 82%
(1) All room temperature limits are 100% production tested. All limits at temperature extremes are specified via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely norm.
(3) External components such as the catch diode, inductor, input and output capacitors can affect switching regulator system performance. When the LM2598 is used as shown in the Figure 42 and Figure 45, system performance is as shown in system parameters of Electrical Characteristics.

7.7 Electrical Characteristics – 12-V Version

Specifications are for TJ = 25°C, unless otherwise specified.
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
SYSTEM PARAMETERS(3) (see Figure 42 and Figure 45 for test circuits)
VOUT Output voltage 15 V ≤ VIN ≤ 40 V,
0.1 A ≤ ILOAD ≤ 1 A		 TJ = 25°C 11.52 12 12.48 V
Over full operating temperature range 11.4 12.6
η Efficiency VIN = 25 V, ILOAD = 1 A 90%
(1) All room temperature limits are 100% production tested. All limits at temperature extremes are specified via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely norm.
(3) External components such as the catch diode, inductor, input and output capacitors can affect switching regulator system performance. When the LM2598 is used as shown in the Figure 42 and Figure 45, system performance is as shown in system parameters of Electrical Characteristics.

7.8 Electrical Characteristics – Adjustable Voltage Version

Specifications are for TJ = 25°C, unless otherwise specified.
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
SYSTEM PARAMETERS(3) (see Figure 42 and Figure 45 for test circuits)
VFB Feedback voltage 4.5 V ≤ VIN ≤ 40 V, 0.1 A ≤ ILOAD ≤ 1 A 1.23 V
VOUT programmed for 3 V, circuit of Figure 42 and Figure 45 TJ = 25°C 1.193 1.267
Over full operating temperature range 1.18 1.28
η Efficiency VIN = 12 V, VOUT = 3 V, ILOAD = 1 A 78%
(1) All room temperature limits are 100% production tested. All limits at temperature extremes are specified via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely norm.
(3) External components such as the catch diode, inductor, input and output capacitors can affect switching regulator system performance. When the LM2598 is used as shown in the Figure 42 and Figure 45, system performance is as shown in system parameters of Electrical Characteristics.

7.9 Electrical Characteristics – All Output Voltage Versions

Specifications are for TJ = 25°C unless otherwise noted. Unless otherwise specified, VIN = 12 V for the 3.3-V, 5-V, and Adjustable version and VIN = 24 V for the 12-V version. ILOAD = 500 mA
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
DEVICE PARAMETERS
Ib Feedback bias current Adjustable version only,
VFB = 1.3 V		 TJ = 25°C 10 50 nA
Over full operating temperature range 100
fO Oscillator frequency See(3) TJ = 25°C 127 150 173 kHz
Over full operating temperature range 110 173
VSAT Saturation voltage IOUT = 1 A (4)(5) TJ = 25°C 1 1.2 V
Over full operating temperature range 1.3
DC Max duty cycle (ON) See(5) 100%
Minimum duty cycle (OFF) See(6) 0%
ICL Current limit Peak current(4)(5) TJ = 25°C 1.2 1.5 2.4 A
Over full operating temperature range 1.15 2.6
IL Output leakage current Output = 0 V, see(4)(6)(7) 50 μA
Output = –1 V 2 15 mA
IQ Operating quiescent current SD/SS pin open(6) 5 10 mA
ISTBY Current standby quiescent SD/SS pin = 0 V(7) TJ = 25°C 85 200 μA
Over full operating temperature range 250
SHUTDOWN AND SOFT-START CONTROL (see Figure 42 and Figure 45 for test circuits)
VSD Shutdown threshold voltage TJ = 25°C 1.3 V
Low, (Shutdown Mode), over full operating temperature range 0.6
High, (Soft-start Mode), over full operating temperature range 2
VSS Soft-start voltage VOUT = 20% of nominal output voltage 2 V
VOUT = 100% of nominal output voltage 3
ISD Shutdown current VSHUTDOWN = 0.5 V 5 10 μA
ISS Soft-start current VSoft-start = 2.5 V 1.6 5 μA
FLAG AND DELAY CONTROL (see Figure 42 and Figure 45 for test circuits)
Regulator dropout detector threshold voltage Low (Flag ON) 92% 96% 98%
VFSAT Voltage flag output saturation ISINK = 3 mA 0.3 V
VDELAY = 0.5 V TJ = 25°C 0.7 V
Over full operating temperature range 1
IFL Flag output leakage current VFLAG = 40 V 0.3 μA
Voltage delay pin threshold 1.25 V
Low (Flag ON) 1.21 V
High (Flag OFF) and VOUT Regulated 1.29
Delay pin source current VDELAY = 0.5 V 3 6 μA
Delay pin saturation Low (Flag ON) TJ = 25°C 55 350 mV
Over full operating temperature range 400
(1) All room temperature limits are 100% production tested. All limits at temperature extremes are specified via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely norm.
(3) The switching frequency is reduced when the second stage current limit is activated. The amount of reduction is determined by the severity of current overload.
(4) No diode, inductor or capacitor connected to output pin.
(5) Feedback pin removed from output and connected to 0 V to force the output transistor switch ON.
(6) Feedback pin removed from output and connected to 12 V for the 3.3-V, 5-V, and the Adjustable version, and 15 V for the 12-V version, to force the output transistor switch OFF.
(7) VIN = 40 V.

7.10 Typical Characteristics

Circuit of Figure 45
LM2598 01259302.png Figure 1. Normalized Output Voltage
LM2598 01259314.png Figure 3. Efficiency
LM2598 01259316.png Figure 5. Switch Current Limit
LM2598 01259304.png Figure 7. Operating Quiescent Current
LM2598 01259306.png Figure 9. Minimum Operating Supply Voltage
LM2598 01259307.png Figure 11. Flag Saturation Voltage
LM2598 01259309.png Figure 13. Soft-start
LM2598 01259311.png Figure 15. Delay Pin Current
LM2598 01259313.png Figure 17. Shutdown and Soft-start Threshold Voltage
LM2598 01259303.png Figure 2. Line Regulation
LM2598 01259315.png Figure 4. Switch Saturation Voltage
LM2598 01259317.png Figure 6. Dropout Voltage
LM2598 01259305.png Figure 8. Shutdown Quiescent Current
LM2598 01259349.png Figure 10. Feedback Pin Bias Current
LM2598 01259308.png Figure 12. Switching Frequency
LM2598 01259310.png Figure 14. Shutdown/Soft-start Current
LM2598 01259312.png Figure 16. Soft-start Response