7.3.1.1 High-Voltage Control Banks (A/B)

There are 2 high-voltage control banks (A and B). Both high-voltage current sinks can be assigned to either Control Bank A or Control Bank B. Assigning both current sinks to the same control bank allows for better LED current matching. Assigning each current sink to different control banks allows for each current sink to be programmed with a different current. The high-voltage control bank mapping is done via bits [1:0] of the Current Sink Output Configuration Register #1 (address 0x10).

7.3.1.2 Low-Voltage Control Banks (C, D, E, And F)

There are 4 low-voltage control banks (C, D, E, and F). Any low-voltage current sink (LVLED1 to LVLED5) can be assigned to any of the low-voltage control banks. Assigning every low-voltage current sink to the same control bank allows for the best matching between LEDs. Assigning each low-voltage current sink to different control banks allows for each current sink to be programmed with different current levels.

7.4.1.1 High-Voltage Current Sinks (HVLED1 And HVLED2)

HVLED1 and HVLED2 control the current in the high-voltage LED strings. Each current sink has 5-bit full-scale current programmability and 8-bit brightness control. Either current sink can have its current set through a dedicated brightness register or be controlled via the ambient light sensor interface. Configuration of the high-voltage current sinks is done through the Control A/B Brightness Configuration Register (see Table 8).

7.4.1.2 High-Voltage Current String Biasing

Each high-voltage current string can be powered from the LM3533’s boost output (COUT) or from an external source. The Anode Connect Register bits [1:0] determine where the high-voltage current string anodes are connected. When set to 1 (default) the high-voltage current sink inputs are included in the boost feedback loop. This allows the boost converter to adjust its output voltage in order to maintain at least 400 mV at the current sink input.

When powered from alternate sources, bits [1:0] must be set to 0 . This removes the particular current sink from the boost feedback loop. In these configurations the application must ensure that the headroom voltage across the high-voltage current sink is high enough to prevent the current sink from going into dropout (see the Typical Characteristics for data on the high-voltage LED current vs headroom voltage).

Setting the Anode Connect Register bits also determines how the shorted high-voltage LED String Fault flag is triggered (see Fault Flags/Protection Features).

7.4.1.3 Boost Switching-Frequency Select

The LM3533’s boost converter can have a 1-MHz or 500-kHz switching frequency. For a 500-kHz switching frequency the inductor must be between 10 µH and 22 µH. For the 1MHz switching frequency the inductor can be between 4.7 µH and 22 µH. The boost frequency is programmed through bit [1] of the OVP/Boost Frequency/PWM Polarity Select register.

7.4.2.1 Charge Pump Disabled

With the charge pump disabled, the path from IN to CPOUT is high impedance. Additionally, with the charge pump disabled, the low-voltage current sinks can still be active, thus allowing the low-voltage LEDs to be biased from external sources (see Low-Voltage LED Biasing). Disabling the charge pump also has no influence on the state of the low-voltage current sinks. For instance, if a low-voltage current string is set to have its anode connected to CPOUT, and the charge pump is disabled, the current sink continues to try to sink current.

7.4.2.2 Automatic Gain

In Automatic Gain Mode the charge pump gain transition is actively selected to maintain LED current regulation in the CPOUT-connected, low-voltage current sinks. At higher input voltages the charge pump operates in Pass Mode (1× gain) allowing the voltage at CPOUT to track the input voltage. As V_IN drops, the voltage on the low-voltage current sink(s) also drops. Once any of the active, CPOUT-connected, low-voltage current sink input voltages reach typically 100 mV, the charge pump automatically switches to a gain of 2× thus preventing dropout (see 2× Gain). Once the charge pump switches over to 2× gain it remains in 2× gain, even if the current sink input voltage goes above the switch over threshold.

7.4.2.3 Automatic Gain (Flying Capacitor Detection)

In Automatic Gain Mode the LM3533 starts up and automatically detect if there is a flying capacitor (CP) connected from C+ to C−. If there is, Automatic Gain Mode operates normally. If the detection circuitry detects that there is no flying capacitor connected, the LM3533 automatically switches to 1× Gain mode.

7.4.2.4 1× Gain

In 1× Gain Mode the charge pump passes V_IN directly through to CPOUT. There is a resistive drop between IN and CPOUT in this mode (1.1 Ω) which must be accounted for when determining the headroom requirement for the low-voltage current sinks. In forced 1× Gain Mode the charge pump does not switch; thus, the flying capacitor (CP) and output capacitor (CPOUT) can be omitted from the circuit.

7.4.2.5 2× Gain

In 2× Gain Mode the internal charge pump doubles V_IN and post-regulate CPOUT to typically 4.4 V. This allows for biasing LEDs whose forward voltages are greater than the input supply (V_IN).

7.4.2.6 Low-Voltage Current Sinks (LVLED1 to LVLED5)

Current sinks LVLED1 to LVLED5 each provide the current for a single LED. These low-voltage sinks are configurable with different blinking patterns via the 4 internal pattern generators. Each low-voltage current sink has 8-bit brightness control and 5-bit full-scale current programmability. Additionally, each low-voltage current sink can have its current set through a dedicated brightness register, the PWM input, the ambient light sensor interface, or a combination of these. Configuration of the low-voltage current sinks is done through the low-voltage Control Banks (C, D, E, or F). Any low-voltage current sink can be mapped to any of the low-voltage control banks.

7.4.2.7 Low-Voltage LED Biasing

Each low-voltage LED can be powered from the LM3533’s charge pump output (CPOUT) or from an external source. When powered from CPOUT the anode connect bit (Anode Connect Register bits [6:2]) for that particular low-voltage current sink must be set to '1' (default). This allows for the specific low-voltage current sink to have control over the charge pumps gain control (see Automatic Gain section).

When powered from alternate sources (such as VIN) the anode connect bit for the particular low-voltage current sink must be set to '0'. This removes the particular current sink from the charge pump feedback loop. In these configurations the application must ensure that the headroom voltage across the low-voltage current sink is high enough to prevent the low-voltage current sinks from going into dropout (see Typical Characteristics for data on the low-voltage LED current vs headroom voltage).

The LVLEDx Anode Connect bits also determine how the Shorted low-voltage LED String fault flag is triggered (see Fault Flags/Protection Features).

7.4.3.1 Exponential Mapping

In Exponential Mapping mode the brightness code to backlight current transfer function is given by Equation 1:

Equation 1.

where

• I_{LED_FULLSCALE} is the full-scale LED current setting (see Table 11)
• Code is the backlight code in the Brightness register
• D_PWM is the PWM input duty cycle.

In Exponential Mapping mode the current ramp (either up or down) appears to the human eye as a more uniform transition then the linear ramp. This is due to the logarithmic response of the eye.

7.4.3.2 Linear Mapping

In Linear Mapping Mode the brightness code to backlight current has a linear relationship and follows Equation 2:

Equation 2.

where

• I_{LED_FULLSCALE} is the full-scale LED current setting
• Code is the backlight code in the Brightness register
• D_PWM is the PWM input duty cycle.

7.4.4.1 Start-Up/Shutdown Ramp

The startup and shutdown ramp times are independently programmable in the Start-Up/Shutdown Transition Time Register (see Table 4). There are 8 different start-up and 8 different shutdown times. The start-up times can be programmed independently from the shutdown times, but teach Control bank is not independently programmable. For example, programming a start-up or shutdown time does not affect the already pre-programmed ramp time for each Control Bank.

The start-up ramp time is from when the Control Bank is enabled to when the LED current reaches its initial set point. The shutdown ramp time is from when the Control Bank is disabled to when the LED current reaches 0.

7.4.4.2 Run-Time Ramp

Current ramping from one brightness level to the next is programmed via the Run-Time Transition Time Register (see Table 5). There are 8 different ramp-up times and 8 different ramp-down times. The ramp-up time can be programmed independently from the ramp-down time, but each Control Bank cannot be independently programmed. For example, programming a ramp-up or ramp-down time is a global setting for all Control Banks.

7.4.6.1 PWM Input Frequency Range

The usable input frequency range for the PWM input is governed on the low end by the cutoff frequency of the internal low-pass filter (540 Hz, Q = 0.33) and on the high end by the propagation delays through the internal logic. For frequencies below 2 kHz the current ripple begins to become a larger portion of the DC LED current. Additionally, at lower PWM frequencies the boost output voltage ripple increases, causing a non-linear response from the PWM duty cycle to the average LED current due to the response time of the boost. For the best response of current vs. duty cycle, the PWM input frequency must be kept between 2 kHz and 100 kHz.

7.4.6.2 PWM Input Polarity

The PWM Input can be set for active low polarity, where the LED current is a function of the negative duty cycle. This is set via the OVP/Boost Frequency/PWM Polarity Register (see Table 20).

7.4.7.1 ALS Brightness Zones (Zone Boundaries)

The LM3533 provides for a 5 brightness zone ambient light sensor interface. This allows for the LED current in any current sink to change based upon which zone the received ambient light falls into. The brightness zones are configured via 4 ALS Zone Boundary High and 4 ALS Zone Boundary Low Registers. Each Zone Boundary register is 8 bits with a full-scale voltage of 2 V. This gives a 2 V/255 = 7.843 mV per bit. Figure 26 shows the mapping from the ALS Brightness Zone to the target backlight current.

7.4.7.2 Zone Boundary Hysteresis

For each Zone Boundary there are two Zone Boundary Registers: a Zone Boundary High Register and a Zone Boundary Low Register (see Table 30). The difference between the Zone Boundary High and Zone Boundary Low Registers (for a specific zone) creates the hysteresis that is required to transition between zones. This hysteresis prevents the backlight current from oscillating between zones when the ALS voltage is close to a Zone Boundary Threshold. For Zone-to-Zone transitions the increasing ALS voltage must cross the Zone Boundary High Threshold in order to get into the next higher zone. Conversely, the ALS decreasing voltage must cross below the Zone Boundary Low Threshold in order to get into the next lower zone. Figure 25 describes this Zone Boundary Hysteresis.

Figure 25. ALS Zone Boundary + Hysteresis

(1) The arrows indicate the direction of the ALS voltage.

7.4.7.3 Zone Target Registers (ALSM1, ALSM2, ALSM3)

For each brightness zone there is a programmable brightness target which is set via the ALS Zone Target Registers (see Table 31, Table 32, and Table 33). There are 3 sets of ALS Zone Target Registers (ALSM1, ALSM2, and ALSM3). The ALSM1 Zone Target Registers are dedicated to only Control Bank 1. ALSM2 and ALSM3 registers can be assigned to any of the Control Banks (B – F) (see Table 8 and Table 10). Each of the Zone Target Registers consists of an 8-bit code which is a percentage of the programmed full-scale current. This percentage of full-scale current is dependent on the selected mapping mode. Figure 26 details the mapping of the ALS Brightness Zone to the ALSM_ Zone Target Registers.

Figure 26. ALS Brightness Zone To Backlight Current Mapping

7.4.7.4 PWM Input in ALS Mode

The PWM input can be enabled for any of the 5 Brightness Zones (see Table 7). This makes the brightness target for the PWM enabled zone have its current a function of the PWM input duty cycle, the full-scale current setting for that particular bank, and the brightness target for that particular zone.

7.4.8.1 ALS Input

The ALS input is designed to connect to an analog or PWM output ambient light sensor. The ALS Configuration Register Bit [1] selects which type of sensor interface is used at the ALS input (see Table 22).

7.4.8.2 Analog Output Ambient Light Sensors (ALS Gain Setting Resistors)

With ALS Cnfiguration Register bit [1] = 0, the ALS input is set for Analog Sensor mode. In this mode the LM3533 offers 128 programmable internal resistors at the ALS input (including a high-impedance option); see Table 21. These resistors are designed to take the output of an analog ambient light sensor and convert it into a voltage. The value of the resistor selected is typically chosen such that the ALS input voltage is 2 V at the maximum ambient light (LUX) value. The sensed voltage at the ALS input is digitized by the LM3533’s internal 8-bit ADC with a full-scale value (0xFF) corresponding to 2 V.

7.4.8.3 PWM Output Ambient Light Sensors (Internal Filtering)

With the ALS Configuration Register bit [1] = 1, the ALS input is set for PWM-Sensor mode. In this mode the LM3533 offers an internal level shifter and low-pass filter (ALS PWM Input mode). With this mode enabled the ALS input accepts logic level PWM signals and converts them into a 0-to-2-V analog voltage which is then filtered. This 0-to-2-V analog representation of the PWM signal is then applied to the internal 8-bit ADC, where 2 V is the full scale (code 0xFF). The internal filter has a corner frequency of 540 Hz and provides 51 dB of attenuation (355×) at a 10-kHz input frequency.

Because the internal ADC for the ambient light sensor utilizes an 8-bit ADC, the attenuation of the ALS input signal needs to be greater than 1/255 (1 LSB = 7.843 mV) in order to realize the full 8-bit range. This forces the frequency for the PWM signal at the ALS input to be around 6 kHz or greater. For slower moving signals an external RC filter may need to be combined with the Analog Sensor Mode (see Application and Implementation).

When the ALS input is set for ALS PWM Input Mode the internal ALS resistor setting is automatically set for high impedance, no matter what the setting in the ALS Select Register.

7.4.8.4 Internal 8-Bit ADC

The LM3533 digitizes the ALS voltage using an internal 8-bit ADC. The ADC is active as long as the ALS enable bit is set. Once set, the ADC begins sampling and converting the voltage at the ALS input at 7.142 ksps. The ADC output can be read back via the ADC register (address 0x37). With the ALS enable bit set, the ADC register is updated every 140 µs. Figure 28 details the timing of the ADC.

Figure 28. ADC Timing

7.4.8.5 ALS Averager

Once digitized the output of the ADC is sent into the ALS averager. The averager computes the average of the number of samples taken over the programmed average period. The ALS average times are set via bits [5:3] in the ALS Configuration Register. The output of the ALS average can be read back via the ADC Average register (address 0x38). With the ALS Enable bit set, the ADC Average register is updated after each average period (see Figure 28). After every average period the Averager Output stores the information for which brightness zone the ALS input voltage resides in (see Figure 27).

7.4.8.6 Initializing the ALS

On initial start-up of the ALS Interface, the Ambient Light Zone defaults to Zone 0. This allows the ALS to start off in a predictable state. The drawback is that Zone 0 is often not representative of the true ALS Brightness Zone, as the ALS input can get to its ambient light representative voltage much faster than the LED current is allowed to change. In order to avoid a multiple average time wait for the backlight current to get to its correct state, the LM3533 switches over to a fast average period (1.1 ms) during the ALS start-up. This quickly brings the ALS Brightness Zone (and the backlight current) to its correct setting (see Figure 29).

Figure 29. ALS Start-up Sequence

7.4.8.7 ALS Algorithms

There are three ALS algorithms that can be selected independently by each ALS Mapper (ALSM1, ALSM2, and ALSM3) (see Table 23). The ALS algorithms are: direct, up only, and down delay.

7.4.8.8 ALS Rules

For each algorithm, the ALS follows these basic rules:

1. For the ALS Interface to force a change in the backlight current (to a higher zone target), the averager output must have shown an increase for 3 consecutive average periods, or an increase and a remain at the new zone for 3 consecutive average periods.
2. For the ALS Interface to force a change in the backlight current (to a lower zone target), the averager output must have shown a decrease for 3 consecutive average periods, or a decrease and remain at the new zone for 3 consecutive average periods.
3. If condition 1 or 2 above is satisfied, and during the next average period the averager output changes again in the same direction as the last change, the LED current immediately changes at the beginning of the next average period.
4. If condition 1 or 2 above is satisfied, and the next average period shows no change in the average zone, or shows a change in the opposite direction, then the criteria in condition 1 or 2 must be satisfied again before the ALS interface can force a change in the backlight current.
5. The Averager Output (see Figure 27) contains the zone that is determined from the most recent full average period.
6. The ALS Interface only forces a change in the backlight current at the beginning of an average period.
7. When the ALS forces a change in the backlight current the change is to the brightness target pointed to by the zone in the Averager Output.

7.4.8.9 Direct ALS Control

In direct ALS control the LM3533 ALS Interface can force the backlight current to either a higher zone target or a lower zone target using the rules described in ALS Rules. In the example of Figure 30, the plot shows the ALS voltage, the current average zone which is the zone determined by averaging the ALS voltage in the current average period, the Averager Output which is the zone determined from the previous full average period, and the target backlight current that is controlled by the ALS Interface. The following steps detail the Direct ALS algorithm:

1. When the ALS is enabled the ALS fast start-up (1.1-ms average period) quickly brings the Averager Output to the correct zone. This takes 3 fast average periods or approximately 3.3ms.
2. The 1st average period the ALS voltage averages to Zone 4.
3. The 2nd average period the ALS voltage averages to Zone 3.
4. The 3rd average period the ALS voltage averages to Zone 0 and the Averager Output shows a change from Zone 4 to Zone 3.
5. The 4th average period the ALS voltage averages to Zone 2 and the Averager Output remains at its changed state of Zone 3.
6. The 5th average period the ALS voltage averages to Zone 1. The Averager Output shows a change from Zone 3 to Zone 2. Because this is the 3rd average period that the Averager Output has shown a change in the decreasing direction from the initial Zone 4, the backlight current is forced to change to the current Averager Output (Zone 2's) target current.
7. The 6th average period the ALS voltage averages to Zone 2. The Averager Output changes from Zone 2 to Zone 1. Because this is in the same direction as the previous change, the backlight current is forced to change to the current Averager Output (Zone 1's) target current.
8. The 7th average period the ALS voltage averages to Zone 3. The Averager Output changes from Zone 1 to Zone 2. Because this change is in the opposite direction from the previous change, the backlight current remains at Zone 1's target.
9. The 8th average period the ALS voltage averages to Zone 3. The Averager Output changes from Zone 2 to Zone 3.
10. The 9th average period the ALS voltage averages to Zone 3. The Averager Output remains at Zone 3. Because this is the 3rd average period that the Averager Output has shown a change in the increasing direction from the initial Zone 1, the backlight current is forced to change to the current Averager Output (Zone 3's) target current.
11. The 10th average period the ALS voltage averages to Zone 4. The Averager Output remains at Zone 3.
12. The 11th average period the ALS voltage averages to Zone 4. The Averager Output changes to Zone 4.
13. The 12th average period the ALS voltage averages to Zone 4. The Averager Output remains at Zone 4.
14. The 13th average period the ALS voltage averages to Zone 4. The Averager Output remains at Zone 4. Because this is the 3rd average period that the Averager Output has shown a change in the increasing direction from the initial Zone 3, the backlight current is forced to change to the current Averager Output (Zone 4's) target current.

Figure 30. Direct ALS Control

7.4.8.10 Up-Only Control

The ALS Up-Only Control algorithm is similar to Direct ALS Control except the ALS Interface can only program the backlight current to a higher zone target. Referring to Figure 31:

1. When the ALS is enabled the ALS fast startup (1.1ms average period) quickly brings the Averager Output to the correct zone. This takes 3 fast average periods or approximately 3.3 ms.
2. The 1st average period the ALS voltage averages to Zone 1.
3. The 2nd average period the ALS voltage averages to Zone 0.
4. The 3rd average period the ALS voltage averages to Zone 0, and the Averager Output shows a change from Zone 1 to Zone 0.
5. The 4th average period the ALS voltage averages to Zone 2, and the Averager Output remains at its changed state of Zone 0.
6. The 5th average period the ALS voltage averages to Zone 2. The Averager Output remains at Zone 0. Because the Up Only algorithm is chosen the backlight current remains at the Zone 1 target even though this is the 3rd consecutive average period that the Averager Output has shown a change since the initial Zone 1.
7. The 6th average period the ALS voltage averages to Zone 2. The Averager Output changes from Zone 0 to Zone 2.
8. The 7th average period the ALS voltage averages to Zone 3. The Averager Output remains at Zone 2.
9. The 8th average period the ALS voltage averages to Zone 3. The Averager Output remains at Zone 2. Because this is the 3rd average period that the Averager Output has shown a change in the up direction, the backlight current is forced to change to the current Averager Output (Zone 2's) target current.
10. The 9th average period the ALS voltage averages to Zone 3. The Averager Output changes from Zone 2 to Zone 3. Because this is a change in the increasing Zone direction, and is a consecutive change following a new backlight target current transition, the backlight current is again forced to change to the current Averager Output (Zone 3's) target current.
11. The 10th average period the ALS voltage averages to Zone 4. The Averager Output remains at Zone 3.
12. The 11th average period the ALS voltage averages to Zone 4. The Averager Output changes to Zone 4.
13. The 12th average period the ALS voltage averages to Zone 4. The Averager Output remains at Zone 4.
14. The 13th average period the ALS voltage averages to Zone 4. The Averager Output remains at Zone 4. Because this is the 3rd average period that the Averager Output has shown a change in the increasing direction from the initial Zone 3, the backlight current is forced to change to the current Averager Output (Zone 4's) target current.

Figure 31. ALS Up-Only Control

7.4.8.11 Down-Delay Control

The Down-Delay algorithm uses all the same rules from ALS Rules, except it provides for adding additional average period delays required for decreasing transitions of the Averager Output, before the LED current is programmed to a lower zone target current. The additional average period delays are programmed via the ALS Down Delay register. The register provides 32 settings for increasing the down delay from 3 extra (code 00000) up to 34 extra (code 11111). For example, if the down delay algorithm is enabled, and the ALS Down Delay register was programmed with 0x00 (3 extra delays), then the Averager Output would need to see 6 consecutive changes in decreasing Zones (or 6 consecutive average periods that changed and remained lower), before the backlight current was programmed to the lower zones target current. Referring to Figure 32, assume that Down Delay is enabled, and the ALS Down Delay register is programmed with 0x02 (5 extra delays, or 8 average period total delays for downward changes in the backlight target current):

1. When the ALS is enabled the ALS fast startup (1.1ms average period) quickly brings the Averager Output to the correct zone. This takes 3 fast average periods or approximately 3.3 ms.
2. The first average period the ALS voltage averages to Zone 3.
3. The second average period the ALS voltage averages to Zone 2. The Averager Output remains at Zone 3.
4. The 3rd through 7th average period the ALS voltage averages to Zone 2, and the Averager Output stays at Zone 2.
5. The 8th average period the ALS voltage averages to Zone 4. The Averager Output remains at Zone 2.
6. The 9th and 10th average periods the ALS voltage averages to Zone 4. The Averager Output is at Zone 4. Because the Averager Output increased from Zone 2 to Zone 4 and the required Down Delay time was not met (8 average periods), the backlight current was never changed to the Zone 2's target current.
7. The 11th average period the ALS voltage averages to Zone 2. The Averager Output remains at Zone 4. Because this is the 3rd consecutive average period where the Averager Output has shown a change (increasing direction) since the change from Zone 2, the backlight current transitions to Zone 4's target current.
8. The 12th through 26th average periods the ALS voltage averages to Zone 2. The Averager Output remains at Zone 2. At the start of average period #19 the Averager Output has shown the required 8 average period delay from the initial change from Zone 4 to Zone 2. As a result the backlight current is programmed to Zone 2's target current.

Figure 32. ALS Down-Delay Control

7.4.9.1 Delay Time

The Delay time (t_DELAY) is the delay from when the pattern is enabled to when the LED current begins ramping up in the control bank's assigned current source(s). The pattern starts when bit [3] of the respective Control Bank Brightness Configuration Register is written high. There is one t_DELAY register for each pattern generator (4 total). The selectable times are programmed with the lower 6 bits of the t_DELAY registers. The times are split into 2 groups where codes 0x00 to 0x3C are short durations from 16.384 ms (code 0x00) up to 999.424 ms (code 0x3C) or 16.384 ms/bit. The higher codes (0x3D to 0x7F) select t_DELAY from 1130.496 ms up to 9781.248 ms, or 131.072 ms/bit (see Table 35).

7.4.9.2 Rise Time

The LED current rise time (t_RISE) is the time the LED current takes to move from the low-current brightness level (I_LOW) to the high-current brightness level (I_HIGH). The rise time of the LED current (t_RISE) is set via the Pattern Generator Rise Time Registers. Each Pattern Generator has its own rise-time register. There are 8 available rise-time settings (see Table 42).

7.4.9.3 Fall Time

The LED current fall time (t_FALL) is the time the LED current takes to move from the high-current brightness level (I_HIGH) to the low-current brightness level (I_LOW). The fall time of the LED current (t_FALL) is set via the Pattern Generator Fall Time Registers. Each Pattern Generator has its own fall-time register. There are 8 available fall-time settings (see Table 43).

7.4.9.4 High Period

The LED current high period (t_HIGH) is the duration that the LED pattern spends at the high LED current set point (t_HIGH). The t_HIGH times are programmed via the Pattern Generator t_HIGH Registers. The programmable times are broken into 2 groups. The first set (from code 0x00 to 0x3C) increases the t_HIGH time in steps of 16.384 ms. The second set (from code 0x3D to 0x7F) increases the t_HIGH time in steps of 131.072 ms (see Table 39).

7.4.9.5 Low Period

The LED current low period (t_LOW) is the duration that the LED current spends at the low LED current set point (I_LOW). The t_LOW times are programmed via one of the Pattern Generator t_LOW Registers. There are 256 t_LOW settings and are broken into 3 groups of linearly increasing times. The first set (from code 0x00 to 0x3C) increases the t_LOW time in steps of 16.384ms. The second set (from code 0x3D to 0x7F) increases the t_LOW time in steps of 131.072 ms. The third set (from code 0x80 to 0xFF) increases the t_LOW time in steps of 524.288 ms (see Table 37).

7.4.9.6 Low-Level Brightness

The LED current low brightness level (I_LOW) is the LED current set point that the pattern rests at during the t_LOW period. This level is set via the Pattern Generator Low Level Brightness Register(s). The brightness level has 8 bits of programmability. I_LOW is a function of the Control Banks full-scale Current setting, the code in the Pattern Generator Low-Level Brightness Register, the Mapping Mode selected, and the PWM input duty cycle (if PWM is enabled).

For exponential mapping I_LOW is:

Equation 3.

For linear mapping I_LOW is:

Equation 4.

BREGL_X is the Pattern Generator Low-Level Brightness Register setting for the specific Control Bank (see Table 40).

7.4.9.7 High-Level Brightness

The LED current high brightness level (I_HIGH) is the LED current set point that the pattern rests at during the t_HIGH period. This high-current level is set via the Control Banks Brightness Register (BREGCH to BREGFH). The brightness level has 8 bits of programmability. I_HIGH is a function of the Control Banks Full-Scale Current setting, the code in the Control Banks Brightness Register, the Mapping Mode selected, and the PWM input duty cycle (if PWM is enabled).

For exponential mapping I_HIGH is:

Equation 5.

For linear mapping I_HIGH is:

Equation 6.

BREGH_X is the Control Banks Brightness Register setting for the specific Control Bank (see Table 28).

7.4.9.8 ALS Controlled Pattern Current

The current levels (I_HIGH and I_LOW) of the programmable pattern can also be influenced by the ALS input. All the same ALS algorithms apply to the pattern generator current levels (Direct, Up Only, and Down Delay). The difference, however, for the ALS Controlled Pattern Current is that the pattern current is not changed to zone-defined brightness targets, but is changed by a scaled factor of the existing I_HIGH and I_LOW levels. These scaled factors are programmable in the ALS Pattern Scaler Registers (see Table 17, Table 18, and Table 19). Each defined brightness zone has a 4-bit (16-level) scale factor, which takes the programmed pattern current code and multiplies it by the programmed scale factor. This produce a new I_HIGH and I_LOW current level ranging from 1/16 × BREGH and 1/16 × BREGL up to 16/16 × BREGH and 16/16 × BREGL for each ALS zone (see Figure 34). There is only one set of scale factors for all the pattern generators.

Figure 34. ALS Controlled Pattern Current Scaling

For low-voltage control banks that do not have their pattern generator enabled, ALS current control is done via the ALS Mappers. Once a pattern generator is enabled, that particular Control Bank then uses the pattern scalers for ALS Current Control.

7.4.9.9 Interrupt Output Mode

When INT Mode is enabled (ALS Zone Information Register Bit [0] = 1), INT pin is configured as an interrupt output. INT is an open-drain output with an active pulldown of typically 66 Ω. In INT Mode the INT output pulls low if the ALS interface is enabled, and the ALS input has changed zones. Reading back the ALS Zone Information while in this mode clears the INT output and reset it to its open-drain state.

7.4.10.1 Open LED String (HVLED)

An open LED string is detected when the voltage at the input to any active high-voltage current sink has fallen below 200 mV, and the boost output voltage has hit the OVP threshold. This test assumes that the HVLED string that is being detected for an open is connected to the LM3533 boost output (COUT+) (see Table 13). For an HVLED string not connected to the LM3533 boost output voltage, but connected to another voltage source, the boost output will not trigger the OVP flag. In this case an open LED string is not detected.

The procedure for detecting an open fault in the HVLED current sinks (provided they are connected to the boost output voltage) is:

• Apply power to the LM3533
• Enable Open Fault (Register 0xB2, bit [0] = 1)
• Configure HVLED1 and HVLED2 for LED string anode connected to COUT (Register 0x25, bits[1:0] = (1,1)
• Set Bank A full-scale current to 20.2 mA (Register 0x1F = 0x13)
• Set Bank A brightness to max (Register 0x40 = 0xFF)
• Set the startup ramp times to the fastest setting (Register 0x12 = 0x00)
• Assign HVLED1 and HVLED2 to Bank A (Register 0x10, Bits [1:0] = (0, 0)
• Enable Bank A (Register 0x27 Bit[0] = 1
• Wait 4ms
• Read back bits[1:0] of register 0xB0. Bit [0] = 1 (HVLED1 open). Bit [1] = 1 (HVLED2 open)
• Disable all banks (Register 0x27 = 0x00)

7.4.10.2 Shorted LED String (HVLED)

The LM3533 features an LED short fault flag indicating one or more of the HVLED strings have experienced a short. The method for detecting a shorted HVLED strings is if the current sink is enabled and the string voltage (V_OUT – V_HVLED1/2) falls to below (V_IN – 1 V). This test must be performed on one HVLED string at a time. Performing the test with both current sinks enabled can result in a faulty reading if one of the strings is shorted and the other is not.

The procedure for detecting a short in an HVLED string is:

• Apply power to the LM3533
• Enable Short Fault (Register 0xB2, bit [1] = 1)
• Enable Feedback on the HVLED Current Sinks (Register 0x25 = 0xFF)
• Set Bank A full-scale current to 20.2 mA (Register 0x1F = 0x13)
• Set Bank A brightness to max (Register 0x40 = 0xFF)
• Set the startup ramp times to the fastest setting (Register 0x12 = 0x00)
• Assign HVLED1 to Bank A (Register 0x10, Bits [1:0] = (1, 0)
• Enable Bank A (Register 0x27 Bit[0] = 1
• Wait 4 ms
• Read back bits[0] of register 0xB1. 1 = HVLED1 open
• Disable all banks (Register 0x27 = 0x00)
• Repeat the procedure for the HVLED2 string

7.4.10.3 Open LED (LVLED)

The LM3533 features an open LED fault flag indicating one or more of the active LVLED strings are open. An open in an LVLED string is flagged if the voltage at the input to any active low-voltage current sink goes below 110 mV.

Because the open LED detect is flagged when any active current sink input falls below 110 mV, certain configurations can result in falsely triggering an open. These include:

1. LED anode tied to CPOUT, charge pump in 1× gain, and VIN drops low enough to bring any active LVLED current sink below 110 mV.
2. LED anode not tied to CPOUT and VLED_ANODE goes low enough to bring any active LVLED current sink below 110 mV.

The following list describes a test procedure that can be used in detecting an open in the LVLED strings:

• Apply power to the LM3533
• Enable Open Fault (Register 0xB2, bit [0] = 1)
• Configure all LVLED strings for Anode connected to CPOUT (register 0x25 bits[6:2] = 1)
• Force the Charge Pump into 2× gain (Register 0x26 Bits[2:1] = 11). Ensure that CPOUT and CP are in the circuit and that (V_CPOUT is > VF_LVLED + V_{HR_LV})
• Set Bank C full-scale Current to 20.2 mA (Register 0x21 = 0x13)
• Set Bank C brightness to max (Register 0x42 = 0xFF)
• Set the startup ramp times to the fastest setting (Register 0x12 = 0x00)
• Assign LVLED1 - LVLED5 to Bank C (Register 0x11 = 0x00, Register 0x10 = 0x00)
• Enable Bank C (Register 0x27 Bit[2] = 1
• Wait 4ms
• Read back bits[6:2] of register 0xB0. 1 indicates an open and a 0 indicates normal operation (see Table 45).
• Disable all banks (Register 0x27 = 0x00)

7.4.10.4 Shorted LED (LVLED)

The LM3533 features an LED short fault flag indicating when any active low-voltage LED is shorted (anode to cathode). A short in an LVLED is determined when the LED voltage (V_CPOUT – V_HR) falls below 1 V.

A procedure for determining a short in an LVLED string is:

• Apply Power
• Enable Short Fault (Register 0xB2, bit [1] = 1)
• Enable Feedback on the LVLED Current Sinks (Register 0x25 = 0xFF)
• Set Bank C full-scale current to 20.2 mA (Register 0x21 = 0x13)
• Set Bank C brightness to max (Register 0x42 = 0xFF)
• Set the startup ramp times to the fastest setting (Register 0x12 = 0x00)
• Assign LVLED1 to LVLED5 to Bank C (Register 0x11 = 0x00, Register 0x10 = 0x00)
• Set Charge Pump to 1× gain (Register 0x26 = 0x40)
• Enable Bank C (Register 0x27 Bit[2] = 1
• Wait 4ms
• Read bits[6:2] from register 0xB1. A 1 indicates short, and a 0 indicates normal (see Table 46).
• Disable all banks (Register 0x27 = 0x00)

7.4.10.5 Overvoltage Protection (Inductive Boost)

The overvoltage protection threshold (OVP) on the LM3533 has 4 different programmable options (16 V, 24 V, 32 V, and 40 V). The OVP protects the device and associated circuitry from high voltages in the event the high-voltage LED string becomes open. During normal operation, the LM3533 inductive boost converter boosts the output up so as to maintain at least 400 mV at the active, high-voltage (C_OUT connected) current sink inputs. When a high-voltage LED string becomes open, the feedback mechanism is broken, and the boost converter overboosts the output. When the output voltage reaches the OVP threshold the boost converter stops switching, thus allowing the output node to discharge. When the output discharges to V_OVP – 1 V the boost converter begins switching again. The OVP sense is at the OVP pin, so this pin must be connected directly to the inductive boost output capacitor’s positive terminal.

For high-voltage current sinks that have the Anode Connect Register setting such that the high-voltage current sinks anodes are not connected to COUT (feedback is disabled), the over-voltage sense mechanism is not in place to protect the input to the high-voltage current sink. In this situation the application must ensure that the voltage at HVLED1 or HVLED2 doesn’t exceed 40 V.

The default setting for OVP is set at 16 V. For applications that require higher than 16 V at the boost output, the OVP threshold must be programmed to a higher level after powerup.

7.4.10.6 Current Limit (Inductive Boost)

The NMOS switch current limit for the LM3533 inductive boost is set at 1 A. When the current through the LM3533 NFET switch hits this overcurrent protection threshold (OCP), the device turns the NFET off and the inductor’s energy is discharged into the output capacitor. Switching is then resumed at the next cycle. The current limit protection circuitry can operate continuously each switching cycle. The result is that during high-output power conditions the device can continuously run in current limit. Under these conditions the LM3533’s inductive boost converter stops regulating the headroom voltage across the high-voltage current sinks. This results in a drop in the LED current.

7.4.10.7 Current Limit (Charge Pump)

The LM3533 charge pump's output current limit is set high enough so that the device supports 29.8 mA (maximim full-scale current) in all LVLED current sinks. This would typically be (29.5 mA × 5 = 149 mA. For 1× gain the output current limit is typically 350 mA (V_IN = 3.6 V). For 2× gain the current limit is typically 240 mA (output referred), with a typical limit on the input current of 480 mA. The Typical Characteristics detail the charge pump current limit vs V_IN at both 1× and 2× gain settings (see Typical Characteristics).

7.5.1.1 Start and Stop Conditions

The LM3533 is controlled via an I²C-compatible interface. START and STOP conditions classify the beginning and the end of the I²C session. A START condition is defined as SDA transitioning from HIGH to LOW while SCL is HIGH. A STOP condition is defined as SDA transitioning from LOW to HIGH while SCL is HIGH. The I²C master always generates START and STOP conditions. The I²C bus is considered busy after a START condition and free after a STOP condition. During data transmission the I²C master can generate repeated START conditions. A START and a repeated START condition are equivalent function-wise. The data on SDA must be stable during the HIGH period of the clock signal (SCL). In other words, the state of SDA can only be changed when SCL is LOW.

Figure 35. Start and Stop Sequences

7.5.1.2 I²C-Compatible Address

The chip address for the LM3533 is 0110110 (36h) for the -40 device and 0111000 (38h) for the -40A device. After the START condition, the I²C master sends the 7-bit chip address followed by an eighth read or write bit (R/W). R/W= 0 indicates a WRITE and R/W = 1 indicates a READ. The second byte following the chip address selects the register address to which the data is written. The third byte contains the data for the selected register.

7.5.1.3 Transferring Data

Every byte on the SDA line must be eight bits long, with the most significant bit (MSB) transferred first. Each byte of data must be followed by an acknowledge bit (ACK). The acknowledge related clock pulse (9th clock pulse) is generated by the master. The master releases SDA (HIGH) during the 9th clock pulse. The LM3533 pulls down SDA during the 9th clock pulse signifying an acknowledge. An acknowledge is generated after each byte has been received.

Table 1 lists the available registers within the LM3533.

Table 1. LM3533 Register Definitions

Note: If a low-voltage control bank is set to receive its brightness information from either ALSM2 or ALSM3, and then a pattern generator is enabled for that Control Bank, the Control Bank ignores the ALSM2 or ALSM3 zone target information. This prevents conflicts from ALSM2/ALSM3 zone targets and ALS controlled pattern currents.

The selectable codes are available which give a linear step in currents of 10 µA per code based upon 2V/R_ALS. This gives a code to resistance relationship of:

Equation 8.

This register contains the ADC data from the internal 8-bit ADC. This is a read-only register. When the ALS Interface is enabled this register is updated with the digitized ALS information every 140µs.

This register is updated after each average period.

Note: Each Zone Boundary register is 8 bits with a maximum voltage of 2 V. This gives a step size for each Zone Boundary Register bit of:

Equation 11.

When the Mapping Mode is set for exponential mapping (Control Bank_Brightness Configuration Register Bit [2] = 0), the current approximates Equation 12:

Equation 12.

When the Mapping Mode is set for linear mapping (Control Bank_Brightness Configuration Register Bit [2] = 1), the current approximates Equation 13:

Equation 13.

7.6.1.1 Pattern Generator Registers

Figure 36. Pattern Generator Timing

For Exponential Mapping Mode the low-level current becomes:

Equation 14.

For Linear Mapping Mode the low-level current becomes:

Equation 15.

Note: The Pattern Generator high level brightness setting is set through the Control Bank Brightness Registers (see Table 28).