SNOSDF3A November   2022  – May 2024 LMG3522R030 , LMG3526R030

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. Parameter Measurement Information
    1. 6.1 Switching Parameters
      1. 6.1.1 Turn-On Times
      2. 6.1.2 Turn-Off Times
      3. 6.1.3 Drain-Source Turn-On Slew Rate
      4. 6.1.4 Zero-Voltage Detection Times
    2. 6.2 Safe Operation Area (SOA)
      1. 6.2.1 Repetitive SOA
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
      1. 7.2.1 LMG3522R030 Functional Block Diagram
      2. 7.2.2 LMG3526R030 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  GaN FET Operation Definitions
      2. 7.3.2  Direct-Drive GaN Architecture
      3. 7.3.3  Drain-Source Voltage Capability
      4. 7.3.4  Internal Buck-Boost DC-DC Converter
      5. 7.3.5  VDD Bias Supply
      6. 7.3.6  Auxiliary LDO
      7. 7.3.7  Fault Protection
        1. 7.3.7.1 Overcurrent Protection and Short-Circuit Protection
        2. 7.3.7.2 Overtemperature Shutdown Protection
        3. 7.3.7.3 UVLO Protection
        4. 7.3.7.4 High-Impedance RDRV Pin Protection
        5. 7.3.7.5 Fault Reporting
      8. 7.3.8  Drive-Strength Adjustment
      9. 7.3.9  Temperature-Sensing Output
      10. 7.3.10 Ideal-Diode Mode Operation
        1. 7.3.10.1 Overtemperature-Shutdown Ideal-Diode Mode
      11. 7.3.11 Zero-Voltage Detection (ZVD)
    4. 7.4 Start-Up Sequence
    5. 7.5 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Slew Rate Selection
          1. 8.2.2.1.1 Start-Up and Slew Rate With Bootstrap High-Side Supply
        2. 8.2.2.2 Signal Level-Shifting
        3. 8.2.2.3 Buck-Boost Converter Design
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
    4. 8.4 Power Supply Recommendations
      1. 8.4.1 Using an Isolated Power Supply
      2. 8.4.2 Using a Bootstrap Diode
        1. 8.4.2.1 Diode Selection
        2. 8.4.2.2 Managing the Bootstrap Voltage
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Solder-Joint Reliability
        2. 8.5.1.2 Power-Loop Inductance
        3. 8.5.1.3 Signal-Ground Connection
        4. 8.5.1.4 Bypass Capacitors
        5. 8.5.1.5 Switch-Node Capacitance
        6. 8.5.1.6 Signal Integrity
        7. 8.5.1.7 High-Voltage Spacing
        8. 8.5.1.8 Thermal Recommendations
      2. 8.5.2 Layout Examples
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Export Control Notice
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Internal Buck-Boost DC-DC Converter

An internal inverting buck-boost converter generates a regulated negative rail for the turn-off supply of the GaN device. The buck-boost converter is controlled by a peak current mode, hysteretic controller. In normal operation, the converter remains in discontinuous-conduction mode, but can enter continuous-conduction mode during start-up. The converter is controlled internally and requires only a single surface-mount inductor and output bypass capacitor. Typically, the converter is designed to use a 4.7-μH inductor and a 2.2-μF output capacitor.

The buck-boost converter uses a peak current hysteretic control. As shown in Figure 7-2, the inductor current increases at the beginning of a switching cycle until the inductor reaches the peak current limit. Then the inductor current goes down to zero. The idle time between each current pulse is determined automatically by the buck-boost controller, and can be reduced to zero. Therefore, the maximum output current happens when the idle time is zero, and is decided by the peak current but to a first order is independent of the inductor value. However, the peak output current the buck-boost can deliver to the –14-V rail is proportional to the VDD input voltage. Therefore, the maximum switching frequency of the GaN that the buck-boost can support varies with VDD voltage and is only specified for operation up to 2 MHz for VDD voltages above 9 V.

LMG3522R030 LMG3526R030 Buck-Boost Converter Inductor
          Current Figure 7-2 Buck-Boost Converter Inductor Current

The LMG352xR030 supports the GaN operation up to 2 MHz. As power consumption is very different in a wide switching frequency range enabled by the GaN device, two peak current limits are used to control the buck-boost converter. The two ranges are separated by IN positive-going threshold frequency. As shown in Figure 7-3, when switching frequency is in the lower range, the peak current is initially set to the lower value IBBSW,M(low) (typically 0.4A). When switching frequency is in the higher range, the peak current is raised to the higher value IBBSW,M(high) (typically 1 A) and requires a larger inductor. There is a filter on this frequency detection logic, therefore the LMG352xR030 requires five consecutive cycles at the higher frequency before it is set to the higher buck-boost peak current limit. The current limit does not go down again until power off after the higher limit is set. Even if the switching frequency returns to the lower range, the current limit does not decrease to the lower limit.

LMG3522R030 LMG3526R030 Buck-Boost Converter Peak
          Current Figure 7-3 Buck-Boost Converter Peak Current

As the peak current of the buck-boost is subject to two different peak current limits which are 0.4A and 1A for low and high frequency operation (see Internal Buck-Boost DC-DC Converter), so the inductor must have a saturation current well above the rated peak current limit. After the higher limit is established by switching at a higher frequency, the current limit does not go back to the lower level even when GaN device is then switched at a lower frequency. Therefore, selecting an inductor according to the higher 1A limit is recommended.