SBOS965D October   2019  – January 2023 LMH32401

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: Gain = 2 kΩ
    6. 6.6 Electrical Characteristics: Gain = 20 kΩ
    7. 6.7 Electrical Characteristics: Both Gains
    8. 6.8 Electrical Characteristics: Logic Threshold and Switching Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Switched Gain Transimpedance Amplifier
      2. 7.3.2 Clamping and Input Protection
      3. 7.3.3 ESD Protection
      4. 7.3.4 Differential Output Stage
    4. 7.4 Device Functional Modes
      1. 7.4.1 Ambient Light Cancellation (ALC) Mode
      2. 7.4.2 Power-Down Mode (Multiplexer Mode)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGT|16
  • Y|0
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.8 Electrical Characteristics: Logic Threshold and Switching Characteristics

VDD = 3.3 V, VOCM = Open, VOD = 0 V, CPD (1) = 1 pF, EN = 0 V, GAIN = 0 V / 3.3 V, IDC_EN = 3.3 V, RL = 100 Ω, and TA = 25℃. (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
LOGIC THRESHOLD PERFORMANCE
High gain enable, threshold voltage Amplifier in high gain above this voltage 1.8 2 V
Low gain enable, threshold voltage Amplifier in low gain below this voltage 0.8 1 V
EN control, disable threshold voltage Amplifier disabled above this voltage 1.8 2 V
EN control, enable threshold voltage Amplifier enabled below this voltage 0.8 1 V
IDC_EN control, disable threshold voltage Ambient light cancellation loop disabled above this voltage 1.8 2 V
IDC_EN control, enable threshold voltage Ambient light cancellation loop enabled below this voltage 0.8 1 V
GAIN CONTROL TRANSIENT PERFORMANCE
High gain to low gain transition-time,
(1% settling)		 Ambient loop disabled, fIN = 25 MHz,
VOUT = 1 VPP (Initial condition), IDC = 0 µA		 90 ns
Low gain to high gain transition-time,
(1% settling)		 Ambient loop disabled, fIN = 25 MHz,
VOUT = 1 VPP (Final condition), IDC = 0 µA		 750 ns
High gain to low gain transition-time,
(1% settling)		 Ambient loop enabled, fIN = 25 MHz,
VOUT = 1 VPP (Initial condition), IDC = 100 µA		 4 µs
Low gain to high gain transition-time,
(1% settling)		 Ambient loop enabled, fIN = 25 MHz,
VOUT = 1 VPP (Final condition), IDC = 100 µA		 4 µs
EN CONTROL TRANSIENT PERFORMANCE
Enable transition-time (1% settling) Ambient loop disabled, fIN = 25 MHz, VOUT = 1 VPP, IDC = 0 µA, GAIN = 2 kΩ 125 ns
Disable transition-time (1% settling) Ambient loop disabled, fIN = 25 MHz, VOUT = 1 VPP, IDC = 0 µA, GAIN = 2 kΩ 3 ns
Enable transition-time (1% settling) Ambient loop disabled, fIN = 25 MHz, VOUT = 1 VPP, IDC = 0 µA, GAIN = 20 kΩ 850 ns
Disable transition-time (1% settling) Ambient loop disabled, fIN = 25 MHz, VOUT = 1 VPP, IDC = 0 µA, GAIN = 20 kΩ 3 ns
Enable transition-time (1% settling) Ambient loop enabled, fIN = 25 MHz, VOUT = 1 VPP, IDC = 100 µA, GAIN = 2 kΩ 10 µs
Disable transition-time (1% settling) Ambient loop enabled, fIN = 25 MHz, VOUT = 1 VPP, IDC = 100 µA, GAIN = 20 kΩ 3.5 ns
Enable transition-time (1% settling) Ambient loop enabled, fIN = 25 MHz, VOUT = 1 VPP, IDC = 100 µA, GAIN = 20 kΩ 4 µs
Disable transition-time (1% settling) Ambient loop enabled, fIN = 25 MHz, VOUT = 1 VPP, IDC = 100 µA, GAIN = 2 kΩ 3 ns
(1) Input capacitance of photodiode.