SNVSAG4A November   2015  – July 2016 LMR14020-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency Peak Current Mode Control
      2. 7.3.2  Slope Compensation
      3. 7.3.3  Sleep-mode
      4. 7.3.4  Low Dropout Operation and Bootstrap Voltage (BOOT)
      5. 7.3.5  Adjustable Output Voltage
      6. 7.3.6  Enable and Adjustable Under-voltage Lockout
      7. 7.3.7  External Soft-start
      8. 7.3.8  Switching Frequency and Synchronization (RT/SYNC)
      9. 7.3.9  Power Good (PGOOD)
      10. 7.3.10 Over Current and Short Circuit Protection
      11. 7.3.11 Overvoltage Protection
      12. 7.3.12 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 CCM Mode
      4. 7.4.4 Light Load Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Voltage Set-Point
        2. 8.2.2.2 Switching Frequency
        3. 8.2.2.3 Output Inductor Selection
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 Schottky Diode Selection
        6. 8.2.2.6 Input Capacitor Selection
        7. 8.2.2.7 Bootstrap Capacitor Selection
        8. 8.2.2.8 Soft-start Capacitor Selection
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
      2. 11.2.2 Related Product
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The LMR14020-Q1 is a step down DC-to-DC regulator. It is typically used to convert a higher DC voltage to a lower DC voltage with a maximum output current of 2 A. The following design procedure can be used to select components for the LMR14020-Q1. This section presents a simplified discussion of the design process.

8.2 Typical Application

The LMR14020-Q1 only requires a few external components to convert from wide voltage range supply to a fixed output voltage. A schematic of 5 V / 2 A application circuit based on LMR14020-Q1 in SO-8 package is shown in Figure 22. The external components have to fulfill the needs of the application, but also the stability criteria of the device’s control loop.

LMR14020-Q1 app_circ_5V_output_snvsa81.gif Figure 22. Application Circuit, 5V Output

8.2.1 Design Requirements

This example details the design of a high frequency switching regulator using ceramic output capacitors. A few parameters must be known in order to start the design process. These parameters are typically determined at the system level:

Table 2. Design Parameters

Input Voltage, VIN 7 V to 36 V, Typical 12 V
Output Voltage, VOUT 5.0 V
Maximum Output Current IO_MAX 2 A
Transient Response 0.2 A to 2 A 5%
Output Voltage Ripple 50 mV
Input Voltage Ripple 400 mV
Switching Frequency fSW 1 MHz
Soft-start time 5 ms

8.2.2 Detailed Design Procedure

8.2.2.1 Output Voltage Set-Point

The output voltage of LMR14020-Q1 is externally adjustable using a resistor divider network. The divider network is comprised of top feedback resistor RFBT and bottom feedback resistor RFBB. Equation 7 is used to determine the output voltage:

Equation 7. LMR14020-Q1 equation_01_snvsah9.gif

Choose the value of RFBT to be 100 kΩ. With the desired output voltage set to 5 V and the VFB = 0.75 V, the RFBB value can then be calculated using Equation 7. The formula yields to a value 17.65 kΩ. Choose the closest available value of 17.8 kΩ for RFBB.

8.2.2.2 Switching Frequency

For desired frequency, use Equation 8 to calculate the required value for RT.

Equation 8. LMR14020-Q1 eq08_snvsag4.gif

For 1 MHz, the calculated RT is 23.36 kΩ and standard value 23.2 kΩ can be used to set the switching frequency at 1 MHz.

8.2.2.3 Output Inductor Selection

The most critical parameters for the inductor are the inductance, saturation current and the RMS current. The inductance is based on the desired peak-to-peak ripple current ΔiL. Since the ripple current increases with the input voltage, the maximum input voltage is always used to calculate the minimum inductance LMIN. Use Equation 9 to calculate the minimum value of the output inductor. KIND is a coefficient that represents the amount of inductor ripple current relative to the maximum output current. A reasonable value of KIND should be 20%-40%. During an instantaneous short or over current operation event, the RMS and peak inductor current can be high. The inductor current rating should be higher than current limit.

Equation 9. LMR14020-Q1 eq09_snvsa81.gif
Equation 10. LMR14020-Q1 eq10_snvsa81.gif

In general, it is preferable to choose lower inductance in switching power supplies, because it usually corresponds to faster transient response, smaller DCR, and reduced size for more compact designs. But too low of an inductance can generate too large of an inductor current ripple such that over current protection at the full load could be falsely triggered. It also generates more conduction loss since the RMS current is slightly higher. Larger inductor current ripple also implies larger output voltage ripple with same output capacitors. With peak current mode control, it is not recommended to have too small of an inductor current ripple. A larger peak current ripple improves the comparator signal to noise ratio.

For this design example, choose KIND = 0.4, the minimum inductor value is calculated to be 5.38 µH, and a nearest standard value is chosen: 5.5 µH. A standard 5.5 μH ferrite inductor with a capability of 2.5 A RMS current and 4 A saturation current can be used.

8.2.2.4 Output Capacitor Selection

The output capacitor(s), COUT, should be chosen with care since it directly affects the steady state output voltage ripple, loop stability and the voltage over/undershoot during load current transients.

The output ripple is essentially composed of two parts. One is caused by the inductor current ripple going through the Equivalent Series Resistance (ESR) of the output capacitors:

Equation 11. LMR14020-Q1 eq11_snvsa81.gif

The other is caused by the inductor current ripple charging and discharging the output capacitors:

Equation 12. LMR14020-Q1 eq12_snvsa81.gif

The two components in the voltage ripple are not in phase, so the actual peak-to-peak ripple is smaller than the sum of two peaks.

Output capacitance is usually limited by transient performance specifications if the system requires tight voltage regulation with presence of large current steps and fast slew rate. When a fast large load increase happens, output capacitors provide the required charge before the inductor current can slew up to the appropriate level. The regulator’s control loop usually needs three or more clock cycles to respond to the output voltage droop. The output capacitance must be large enough to supply the current difference for three clock cycles to maintain the output voltage within the specified range. Equation 13 shows the minimum output capacitance needed for specified output undershoot. When a sudden large load decrease happens, the output capacitors absorb energy stored in the inductor. The catch diode can’t sink current so the energy stored in the inductor results in an output voltage overshoot. Equation 14 calculates the minimum capacitance required to keep the voltage overshoot within a specified range.

Equation 13. LMR14020-Q1 eq13_snvsa81.gif
Equation 14. LMR14020-Q1 eq14_snvsa81.gif

where

  • KIND = Ripple ratio of the inductor ripple current (ΔiL / IOUT)
  • IOL = Low level output current during load transient
  • IOH = High level output current during load transient
  • VUS = Target output voltage undershoot
  • VOS = Target output voltage overshoot

For this design example, the target output ripple is 50 mV. Presuppose ΔVOUT_ESR = ΔVOUT_C = 50 mV, and chose KIND = 0.4. Equation 11 yields ESR no larger than 62.5 mΩ and Equation 12 yields COUT no smaller than 2 μF. For the target over/undershoot range of this design, VUS = VOS = 5% × VOUT = 250 mV. The COUT can be calculated to be no smaller than 21.6 μF and 8.5 μF by Equation 13 and Equation 14 respectively. For stability consideration, one 47 μF output capacitor is needed at least. In summary, the most stringent criteria for the output capacitor is 47 μF. One 47 μF, 16 V, X7R ceramic capacitors with 5 mΩ ESR is used.

8.2.2.5 Schottky Diode Selection

The breakdown voltage rating of the diode is preferred to be 25% higher than the maximum input voltage. The current rating for the diode should be equal to the maximum output current for best reliability in most applications. In cases where the input voltage is much greater than the output voltage the average diode current is lower. In this case it is possible to use a diode with a lower average current rating, approximately (1-D) × IOUT however the peak current rating should be higher than the maximum load current. A 2 A rated diode is a good starting point.

8.2.2.6 Input Capacitor Selection

The LMR14020-Q1 device requires high frequency input decoupling capacitor(s) and a bulk input capacitor, depending on the application. The typical recommended value for the high frequency decoupling capacitor is 4.7 μF to 10 μF. A high-quality ceramic capacitor type X5R or X7R with sufficiency voltage rating is recommended. To compensate the derating of ceramic capacitors, a voltage rating of twice the maximum input voltage is recommended. Additionally, some bulk capacitance can be required, especially if the LMR14020-Q1 circuit is not located within approximately 5 cm from the input voltage source. This capacitor is used to provide damping to the voltage spike due to the lead inductance of the cable or the trace. For this design, two 2.2 μF, X7R ceramic capacitors rated for 100 V are used. A 0.1 μF for high-frequency filtering and place it as close as possible to the device pins.

8.2.2.7 Bootstrap Capacitor Selection

Every LMR14020-Q1 design requires a bootstrap capacitor (CBOOT). The recommended capacitor is 0.1 μF and rated 16 V or higher. The bootstrap capacitor is located between the SW pin and the BOOT pin. The bootstrap capacitor must be a high-quality ceramic type with an X7R or X5R grade dielectric for temperature stability.

8.2.2.8 Soft-start Capacitor Selection

Use Equation 15 in order to calculate the soft-start capacitor value:

Equation 15. LMR14020-Q1 eq15_snvsa81.gif

where

  • CSS = Soft-start capacitor value
  • ISS = Soft-start charging current (3 μA)
  • tSS = Desired soft-start time

For the desired soft-start time of 5 ms and soft-start charging current of 3.0 μA, the Equation 15 yields a soft-start capacitor value of 20 nF, a standard 22 nF ceramic capacitor is used.

For LMR14020-Q1 in WSON package, the maximum value of CSS is 4.7 nF.

8.2.3 Application Curves

Unless otherwise specified the following conditions apply: VIN = 12 V, fSW = 1 MHz, L = 5.5 µH, COUT = 47 µF, TA = 25 °C.
LMR14020-Q1 wvfm04_snvsa81.gif
VIN = 12 V VOUT = 5 V IOUT = 1 A
Figure 23. Start-up By EN
LMR14020-Q1 wvfm06_snvsa81.gif
VIN = 12 V VOUT = 5 V IOUT = 0 A
Figure 25. Sleep-mode
LMR14020-Q1 wvfm08_snvsa81.gif
VIN = 12 V VOUT = 5 V IOUT = 2 A
Figure 27. CCM Mode
LMR14020-Q1 wvfm10_snvsa81.gif
VIN = 12 V VOUT = 5 V
Figure 29. Output Short
LMR14020-Q1 wvfm05_snvsa81.gif
VIN = 12 V VOUT = 5 V IOUT = 1 A
Figure 24. Start-up By VIN
LMR14020-Q1 wvfm07_snvsa81.gif
VIN = 12 V VOUT = 5 V IOUT = 100 mA
Figure 26. DCM Mode
LMR14020-Q1 wvfm09_snvsa81.gif
IOUT: 10% → 100% of 2 A Slew rate = 100 mA/μs
Figure 28. Load Transient
LMR14020-Q1 wvfm11_snvsa81.gif
VIN = 12 V VOUT = 5 V
Figure 30. Output Short Recovery