SBOSA28 august   2023 LOG200

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 High Speed, Logarithmic Current-to-Voltage Conversion
      2. 7.3.2 Voltage and Current References
      3. 7.3.3 Adaptive Photodiode Bias
      4. 7.3.4 Auxiliary Operational Amplifier
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Logarithmic Transfer Function
        1. 8.1.1.1 Logarithmic Conformity Error
    2. 8.2 Typical Application
      1. 8.2.1 Optical Current Sensing
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.3 Adaptive Photodiode Bias

The LOG200 includes an IBIAS current output feature that can be used to bias a photodiode with a voltage that is proportional to the photocurrent. The current from the IBIAS pin is nominally 1.1 times the input current of the I1 pin. When an RBIAS resistance is placed in parallel with the photodiode, 1.0 times the input current is drawn through the photodiode and the remaining 0.1 times the input current flows through RBIAS. This configuration establishes a bias voltage across that resistance. As the anode end of the photodiode (connected to the I1 input) is held at VCM, the cathode voltage effectively rises by 0.1 × RBIAS × I1, thus providing a current-dependent reverse bias voltage for the photodiode.

This feature creates very small bias voltages for applications with low photodiode currents, reducing the dark current of the photodiode. In applications with high photodiode currents (which often require larger photodiodes), higher reverse-bias voltages are developed, thus reducing the effective capacitance of the photodiode and increasing the effective device bandwidth. If this feature is not used, float the IBIAS pin.