SNVS056J May   2000  – June 2015 LP3961 , LP3964

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configurations and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Short-Circuit Protection
      2. 7.3.2 ERROR Flag Operation
      3. 7.3.3 SENSE Pin
      4. 7.3.4 Dropout Voltage
      5. 7.3.5 Reverse Current Path
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VOUT(TARGET) + 0.35 V ≤ VIN ≤ 7 V
      2. 7.4.2 Operation With Shutdown (SD) Pin Control
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Capacitors
          1. 8.2.2.1.1 Input Capacitor
          2. 8.2.2.1.2 Output Capacitor
        2. 8.2.2.2 Selecting a Capacitor
        3. 8.2.2.3 Capacitor Characteristics
          1. 8.2.2.3.1 Ceramic
          2. 8.2.2.3.2 Tantalum
          3. 8.2.2.3.3 Aluminum
        4. 8.2.2.4 RFI and EMI Susceptibility
        5. 8.2.2.5 Output Adjustment
        6. 8.2.2.6 Turnon Characteristics for Output Voltages Programmed to 2.0 V or Below
        7. 8.2.2.7 Output Noise
        8. 8.2.2.8 Shutdown Operation
        9. 8.2.2.9 Maximum Output Current Capability
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Heatsinking TO-220 Packages
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The LP3961, LP3964 products can provide 800-mA output current with 2.5-V to 7-V input voltage. An input capacitor of at least 68-uF is required. A minimum 33-uF output capacitor is required for loop stability. Pin SD must be tied to input if not used. For LP3961, the ERROR pin should be pulled high through a pull up resistor; if this function is not used, ERROR pin must be connected to ground . For LP3964, if the sense option is not required, the SENSE pin must be connected to the OUT pin.

8.2 Typical Applications

LP3961 LP3964 10112901.pngFigure 22. LP3961 Typical Application Circuit
LP3961 LP3964 10112902.pngFigure 23. LP3964 Typical Application Circuits

8.2.1 Design Requirements

DESIGN PARAMETERS VALUE
Input voltage 5.3 V, ±10%
Output voltage 3.3 V, ±3%
Output current 800 mA (maximum)
Input capacitor 68 uF (minimum)
Output capacitor 33 uF (minimum)
ERROR pullup resistor (LP3964 only) 10 kΩ

8.2.2 Detailed Design Procedure

8.2.2.1 External Capacitors

Like any low-dropout regulator, external capacitors are required to assure stability. these capacitors must be correctly selected for proper performance.

8.2.2.1.1 Input Capacitor

The LP3961 or LP3964 requires a low source impedance to maintain regulator stability because the internal bias circuitry is connected directly to the IN pin. The input capacitor must be located less than 1 cm from the LP3961 or LP3964 device and connected directly to the IN and GND pins using traces which have no other currents flowing through them (see the Layout Guidelines section).

The minimum allowable input capacitance for a given application depends on the type of the capacitor and equivalent series resistance (ESR). A lower ESR capacitor allows the use of less capacitance, while higher ESR types (like aluminum electrolytics) require more capacitance.

The lowest value of input capacitance that can be used for stable full-load operation is 68 µF (assuming it is a ceramic or low-ESR Tantalum with ESR less than 100 mΩ).

To determine the minimum input capacitance amount and ESR value, an approximation is used:

Equation 1. CIN ESR (mΩ) / CIN (µF) ≤ 1.5

This shows that input capacitors with higher ESR values can be used if sufficient total capacitance is provided. Capacitor types (aluminum, ceramic, and tantalum) can be mixed in parallel, but the total equivalent input capacitance/ESR must be defined as above to assure stable operation.

IMPORTANT: The input capacitor must maintain its ESR and capacitance in the stable range over the entire temperature range of the application to assure stability (see the Capacitor Characteristics section).

8.2.2.1.2 Output Capacitor

An output capacitor is also required for loop stability. It must be located less than 1 cm from the LP3961 or LP3964 device and connected directly to the OUT and GND pins using traces which have no other currents flowing through them (see the Layout Guidelines section).

The minimum value of the output capacitance that can be used for stable full-load operation is 33 µF, but it may be increased without limit. The ESR of the output capacitor is critical because it forms a zero to provide phase lead which is required for loop stability. The ESR must fall within the specified range:

Equation 2. 0.2 Ω ≤ COUT ESR ≤ 5 Ω

The lower limit of 200 mΩ means that ceramic capacitors are not suitable for use as LP3961 or LP3964 output capacitors (but can be used on the input). Some ceramic capacitance can be used on the output if the total equivalent ESR is in the stable range: when using a 100-µF Tantalum as the output capacitor, approximately 3 µF of ceramic capacitance can be applied before stability becomes marginal.

IMPORTANT: The output capacitor must meet the requirements for minimum amount of capacitance and also have an appropriate ESR value over the full temperature range of the application to assure stability (see the Capacitor Characteristics section).

8.2.2.2 Selecting a Capacitor

It is important to note that capacitance tolerance and variation with temperature must be taken into consideration when selecting a capacitor so that the minimum required amount of capacitance is provided over the full operating temperature range. In general, a good Tantalum capacitor will show very little capacitance variation with temperature, but a ceramic may not be as good (depending on dielectric type). Aluminum electrolytics also typically have large temperature variation of capacitance value.

Equally important to consider is a capacitor's ESR change with temperature: this is not an issue with ceramics, as their ESR is extremely low. However, it is very important in Tantalum and aluminum electrolytic capacitors. Both show increasing ESR at colder temperatures, but the increase in aluminum electrolytic capacitors is so severe they may not be feasible for some applications (see the Capacitor Characteristics section).

8.2.2.3 Capacitor Characteristics

8.2.2.3.1 Ceramic

For values of capacitance in the 10- to 100-µF range, ceramics are usually larger and more costly than Tantalums but give superior AC performance for bypassing high-frequency noise because of very low ESR (typically less than 10 mΩ). However, some dielectric types do not have good capacitance characteristics as a function of voltage and temperature.

Z5U and Y5V dielectric ceramics have capacitance that drops severely with applied voltage. A typical Z5U or Y5V capacitor can lose 60% of its rated capacitance with half of the rated voltage applied to it. The Z5U and Y5V also exhibit a severe temperature effect, losing more than 50% of nominal capacitance at high and low limits of the temperature range.

X7R and X5R dielectric ceramic capacitors are strongly recommended if ceramics are used, as they typically maintain a capacitance range within ±20% of nominal over full operating ratings of temperature and voltage. Of course, they are typically larger and more costly than Z5U/Y5U types for a given voltage and capacitance.

8.2.2.3.2 Tantalum

Solid Tantalum capacitors are recommended for use on the output because their typical ESR is very close to the ideal value required for loop compensation. They also work well as input capacitors if selected to meet the ESR requirements previously listed.

Tantalums also have good temperature stability: a good quality Tantalum will typically show a capacitance value that varies less than 10 to 15% across the full temperature range of 125°C to −40°C. ESR will vary only about 2X going from the high to low temperature limits.

The increasing ESR at lower temperatures can cause oscillations when marginal quality capacitors are used (if the ESR of the capacitor is near the upper limit of the stability range at room temperature).

8.2.2.3.3 Aluminum

This capacitor type offers the most capacitance for the money. The disadvantages are that they are larger in physical size, not widely available in surface mount, and have poor AC performance (especially at higher frequencies) due to higher ESR and ESL.

Compared by size, the ESR of an aluminum electrolytic is higher than either Tantalum or ceramic, and it also varies greatly with temperature. A typical aluminum electrolytic can exhibit an ESR increase of as much as 50X when going from 25°C down to −40°C.

It should also be noted that many aluminum electrolytics only specify impedance at a frequency of 120 Hz, which indicates they have poor high-frequency performance. Only aluminum electrolytics that have an impedance specified at a higher frequency (from 20 kHz to 100 kHz) should be used for the LP396X. Derating must be applied to the manufacturer's ESR specification, because it is typically only valid at room temperature.

Any applications using aluminum electrolytics should be thoroughly tested at the lowest ambient operating temperature where ESR is maximum.

8.2.2.4 RFI and EMI Susceptibility

Radio frequency interference (RFI) and electromagnetic interference (EMI) can degrade the performance of any integrated circuit because of the small dimensions of the geometries inside the device. In applications where circuit sources are present which generate signals with significant high-frequency energy content (> 1 MHz), care must be taken to ensure that this does not affect the IC regulator.

If RFI and EMI noise is present on the input side of the LP396x regulator (such as applications where the input source comes from the output of a switching regulator), good ceramic bypass capacitors must be used at the input pin of the LP396x.

If a load is connected to the LP396x output which switches at high speed (such as a clock), the high-frequency current pulses required by the load must be supplied by the capacitors on the LP396x output. Because the bandwidth of the regulator loop is less than 100 kHz, the control circuitry cannot respond to load changes above that frequency. The means the effective output impedance of the LP396x at frequencies above 100 kHz is determined only by the output capacitors.

In applications where the load is switching at high speed, the output of the LP396x may need RF isolation from the load. It is recommended that some inductance be placed between the LP396x output capacitor and the load, and good RF bypass capacitors be placed directly across the load.

PCB layout is also critical in high-noise environments, because RFI and EMI is easily radiated directly into PC traces. Noisy circuitry should be isolated from clean circuits where possible, and grounded through a separate path. At MHz frequencies, ground planes begin to look inductive and RFI/EMI can cause ground bounce across the ground plane.

In multilayer PCB applications, care should be taken in layout so that noisy power and ground planes do not radiate directly into adjacent layers which carry analog power and ground.

8.2.2.5 Output Adjustment

An adjustable output device has output voltage range of 1.216 V to 5.1 V. To obtain a desired output voltage, the following equation can be used with R1 always a 10-kΩ resistor.

Equation 3. LP3961 LP3964 10112934.png

For output stability, CF must be between 68 pF and 100 pF.

8.2.2.6 Turnon Characteristics for Output Voltages Programmed to 2.0 V or Below

As VIN increases during start-up, the regulator output will track the input until VIN reaches the minimum operating voltage (typically about 2.2 V). For output voltages programmed to 2 V or below, the regulator output may momentarily exceed its programmed output voltage during start up. Outputs programmed to voltages above 2 V are not affected by this behavior.

8.2.2.7 Output Noise

Noise is specified in two ways:

  • Spot noise or output noise density is the RMS sum of all noise sources, measured at the regulator output, at a specific frequency (measured with a 1-Hz bandwidth). This type of noise is usually plotted on a curve as a function of frequency.
  • Total output noise or broadband noise is the RMS sum of spot noise over a specified bandwidth, usually several decades of frequencies.

Attention should be paid to the units of measurement. Spot noise is measured in units µV/√Hz or nV/√Hz and total output noise is measured in µV(rms).

The primary source of noise in low-dropout regulators is the internal reference. In CMOS regulators, noise has a low-frequency component and a high-frequency component, which depend strongly on the silicon area and quiescent current. Noise can be reduced in two ways: by increasing the transistor area or by increasing the current drawn by the internal reference. Increasing the area will decrease the chance of fitting the die into a smaller package. Increasing the current drawn by the internal reference increases the total supply current (ground pin current). Using an optimized trade-off of ground pin current and die size, LP396x achieves low noise performance and low quiescent current operation.

The total output noise specification for LP396x is presented in the Electrical Characteristics table. The output noise density at different frequencies is represented by a curve under typical performance characteristics.

8.2.2.8 Shutdown Operation

A CMOS logic level signal at the shutdown (SD) pin will turnoff the regulator. Pin SD must be actively terminated through a 10-kΩ pullup resistor for a proper operation. If this pin is driven from a source that actively pulls high and low (such as a CMOS rail-to-rail comparator), the pull-up resistor is not required. This pin must be tied to the IN pin if not used.

8.2.2.9 Maximum Output Current Capability

LP3961 and LP3964 can deliver a continuous current of 800 mA over the full operating temperature range. A heatsink may be required depending on the maximum power dissipation and maximum ambient temperature of the application. Under all possible conditions, the junction temperature must be within the range specified under operating conditions. The total power dissipation of the device is given by:

Equation 4. PD = (VIN − VOUT) × IOUT + VIN × IGND

where IGND is the operating ground current of the device (specified under the Electrical Characteristics table).

The maximum allowable temperature rise (TRmax) depends on the maximum ambient temperature (TAmax) of the application, and the maximum allowable junction temperature (TJmax):

Equation 5. TRmax = TJmax− TAmax

The maximum allowable value for junction to ambient Thermal Resistance, RθJA, can be calculated using the formula:

Equation 6. RθJA = TRmax / PD

LP3961 and LP3964 are available in TO-220, SFM/TO-263, and SOT-223 packages. The thermal resistance depends on amount of copper area or heat sink, and on air flow.

8.2.3 Application Curves

LP3961 LP3964 10112941.pngFigure 24. Line Transient Response (IOUT = 800 mA)
LP3961 LP3964 10112942.pngFigure 25. Line Transient Response (IOUT = 800 mA)