SDLS972B April   2023  – April 2024 LSF0102

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  LSF0102 AC Performance (Translating Down) Switching Characteristics , VCCB = 3.3V
    7. 5.7  LSF0102 AC Performance (Translating Down) Switching Characteristics, VCCB = 2.5V
    8. 5.8  LSF0102 AC Performance (Translating Up) Switching Characteristics, VCCB = 3.3V
    9. 5.9  LSF0102 AC Performance (Translating Up) Switching Characteristics, VCCB = 2.5V
    10. 5.10 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Auto Bidirectional Voltage Translation
      2. 7.3.2 Output Enable
    4. 7.4 Device Functional Modes
      1. 7.4.1 Up and Down Translation
        1. 7.4.1.1 Up Translation
        2. 7.4.1.2 Down Translation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Open-Drain Interface (I2C, PMBus, SMBus, and GPIO)
        1. 8.2.1.1 Design Requirements
          1. 8.2.1.1.1 Enable, Disable, and Reference Voltage Guidelines
          2. 8.2.1.1.2 Bias Circuitry
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Bidirectional Translation
          2. 8.2.1.2.2 Pull-Up Resistor Sizing
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Mixed-Mode Voltage Translation
      3. 8.2.3 Single Supply Translation
      4. 8.2.4 Voltage Translation for Vref_B < Vref_A + 0.8V
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information
  12. 11Revision History

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DCU|8
  • DDF|8
  • YZT|8
  • DCT|8
  • DQE|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The LSF family of devices supports bidirectional voltage translation without the need for DIR pin which minimizes system effort (for PMBus, I2C, SMBus, and so forth). The LSF family of devices supports up to 100MHz up translation and greater than 100MHz down translation at ≤ 30pF capacitive load and up to 40MHz up or down translation at 50pF capacitive load which allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO).

LSF family supports 5V tolerance on I/O port which makes it compatible with TTL levels in industrial and telecom applications. The LSF family is able to set up different voltage translation levels which makes it very flexible.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
LSF0102DQE (X2SON, 8)1.4mm × 1mm
YZT (DSBGA, 8)1.98mm × 0.98mm
DCT (SM8, 8)2.95mm × 4mm
DCU (VSSOP, 8)2mm × 3.1mm
DDF (SOT-23, 8)2.9mm × 2.8mm
DTM (X2SON, 8)1.35mm x 0.80mm
(1) For more information, see Section 10.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
GUID-20240321-SS0I-5FZF-ZVL5-7LLMHCPJ0SFT-low.svg Functional Block Diagram