SLAS887C September 2014 – March 2021
PRODUCTION DATA
Some interrupt enable and interrupt flag bits are collected into the lowest address space. Special function register bits not allocated to a functional purpose are not physically present in the device. Simple software access is provided with this arrangement.
Legend | |||
rw | Bit can be read and written. | ||
rw-0, rw-1 | Bit can be read and written. It is Reset or Set by PUC. | ||
rw-(0), rw-(1) | Bit can be read and written. It is Reset or Set by POR. | ||
rw-[0], rw-[1] | Bit can be read and written. It is Reset or Set by BOR. | ||
SFR bit is not present in device. |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ACCVIE | NMIIE | OFIE | WDTIE | ||||
rw-0 | rw-0 | rw-0 | rw-0 |
WDTIE | Watchdog timer interrupt enable. Inactive if watchdog mode is selected. Active if watchdog timer is configured in interval timer mode. |
OFIE | Oscillator fault interrupt enable |
NMIIE | (Non)maskable interrupt enable |
ACCVIE | Flash access violation interrupt enable |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
NMIIFG | RSTIFG | BORIFG | OFIFG | WDTIFG | |||
rw-0 | rw-[0] | rw-[1] | rw-0 | rw-(0) |
WDTIFG | Set on watchdog timer overflow (in watchdog mode) or security key violation. Reset on VCC power-up or a reset condition at RST/NMI pin in reset mode. |
OFIFG | Flag set on oscillator fault. This flag can be cleared by software when the oscillator runs free of fault. |
BORIFG | Brown out reset flag. This bit is set after VCC power up and can be cleared by software. |
RSTIFG | External reset interrupt flag. Set on a reset condition at RST/NMI pin in reset mode. Reset on VCC power up. |
NMIIFG | Set by the RST/NMI pin in NMI configuration. |