SBOS847A July   2022  – December 2022 OPA817

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = ±5 V
    6. 7.6 Typical Characteristics: VS = ±5 V
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input and ESD Protection
      2. 8.3.2 Feedback Pin
      3. 8.3.3 FET-Input Architecture with Wide Gain-Bandwidth Product
      4. 8.3.4 Device Functional Modes
        1. 8.3.4.1 Power-Down (PD) Pin
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Wideband, High-Input Impedance DAQ Front-End
    2. 9.2 Typical Applications
      1. 9.2.1 High Input Impedance, 200 MHz, Digitizer Front-End Amplifier Design
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Thermal Considerations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.1.1 Wideband, High-Input Impedance DAQ Front-End

The OPA817 features a unique combination of high GBWP, low-input voltage noise, and the DC precision of a trimmed JFET-input stage to provide a high input impedance for a voltage-feedback amplifier. Figure 9-2 shows how its very high GBWP of 400 MHz and high large signal bandwidth of 250 Mhz can be used to either deliver wide signal bandwidths at high gains or to extend the achievable bandwidth or gain in typical high-speed, high-input impedance data acquisition front-end applications. To achieve the full performance of the OPA817, careful attention to the printed circuit board (PCB) layout and component selection is required as discussed in the following sections of this data sheet. OPA817 also features a wider supply range thereby enabling a wider common-mode input range to support higher input signal swings.

Figure 9-1 shows the noninverting gain of +2 V/V circuit used as the basis for most of the Typical Characteristics. Most of the curves were characterized using signal sources with 50-Ω driving impedance, and with measurement equipment presenting a 50-Ω load impedance. As Figure 9-1 shows, the 49.9-Ω shunt resistor at the VIN terminal matches the source impedance of the test generator, while the 49.9-Ω series resistor at the VO terminal provides a matching resistor for the measurement equipment load. Generally, data sheet voltage swing specifications are at the output pin (VO in Figure 9-1) while output power specifications are at the matched 50-Ω load. As shown in Figure 9-1, the total 100-Ω load at the output combined with the 250-Ω total feedback network load presents the OPA817 with an effective output load of 83.3 Ω for the circuit.

Figure 9-1 Noninverting G = +2 V/V Configuration and Test Circuit
Figure 9-2 High Input Impedance DAQ Front-End

Voltage-feedback operational amplifiers, unlike current feedback amplifiers, can use a wide range of resistor values to set their gain. As Figure 9-1 shows, the parallel combination of RF || RG should always be kept to a lower value to retain a controlled frequency response for the noninverting voltage amplifier. In the noninverting configuration, the parallel combination of RF || RG will form a pole with the parasitic input capacitance at the inverting node of the OPA817 (including layout parasitic capacitance). For best performance, this pole should be at a frequency greater than the closed loop bandwidth for the OPA817.