SCLS940A July   2023  – January 2024 SN74AHCT1G00-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS Push-Pull Outputs
      2. 7.3.2 TTL-Compatible CMOS Inputs
      3. 7.3.3 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC TA = 25°C -40°C to 125°C UNIT
MIN TYP MAX MIN TYP MAX
VOH IOH = –50 µA 4.5 V 4.4 4.5 VCC-0.1 V
IOH = –8 mA 3.94 3.8
VOL IOH = 50 µA 4.5 V 0.1 0.1 V
IOH = 8 mA 0.36 0.44
II VI = 0 V to VCC 0 V to 5.5 V ±0.1 ±1 µA
ICC VI = VCC or GND, IO = 0 5.5 V 1 10 µA
ΔICC One input at 0.3 V or 3.4 V, other inputs at VCC or GND 5.5 V 1.35 1.5 mA
Ci VI = VCC or GND 5 V 2 10 2 10 pF
CPD(1)(2) F = 1 MHz 5 V 11 pF
CPD is used to determine the dynamic power consumption, per channel.
PD= VCC2 × FI × (CPD+ CL) where FI= input frequency, CL= output load capacitance, VCC= supply voltage