SCLS907A December   2022  – April 2023 SN74LV8T245

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics - 1.8-V VCC
    7. 6.7  Switching Characteristics - 2.5-V VCC
    8. 6.8  Switching Characteristics - 3.3-V VCC
    9. 6.9  Switching Characteristics - 5-V VCC
    10. 6.10 Noise Characteristics
    11. 6.11 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS 3-State Outputs
      2. 8.3.2 Clamp Diode Structure
      3. 8.3.3 LVxT Enhanced Input Voltage
        1. 8.3.3.1 Down Translation
        2. 8.3.3.2 Up Translation
      4. 8.3.4 Wettable Flanks
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
    3. 9.3 Design Requirements
      1. 9.3.1 Power Considerations
      2. 9.3.2 Input Considerations
      3. 9.3.3 Output Considerations
      4. 9.3.4 Detailed Design Procedure
    4. 9.4 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

GUID-20220216-SS0I-CMZV-MGKQ-7M6BT2KLPG8M-low.gifFigure 5-1 RKS Package, 20-Pin VQFN (Transparent Top View)
GUID-20200922-CA0I-3QXS-GDZ2-RGMJ0XTDV6LF-low.gifFigure 5-2 DGS or PW Package, 20-Pin VSSOP or TSSOP (Top View)
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
DIR 1 I Direction control input (L = B → A, H = A → B)
A1 2 I/O Channel 1 output/input A
A2 3 I/O Channel 2 output/input A
A3 4 I/O Channel 3 output/input A
A4 5 I/O Channel 4 output/input A
A5 6 I/O Channel 5 output/input A
A6 7 I/O Channel 6 output/input A
A7 8 I/O Channel 7 output/input A
A8 9 I/O Channel 8 output/input A
GND 10 G Ground
B8 11 I/O Channel 8 input/output B
B7 12 I/O Channel 7 input/output B
B6 13 I/O Channel 6 input/output B
B5 14 I/O Channel 5 input/output B
B4 15 I/O Channel 4 input/output B
B3 16 I/O Channel 3 input/output B
B2 17 I/O Channel 2 input/output B
B1 18 I/O Channel 1 input/output B
OE 19 I Output enable, active low
VCC 20 P Positive supply
Thermal Pad(2) The thermal pad can be connected to GND or left floating. Do not connect to any other signal or supply.
I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power
RKS package only