SCAS762D February   2004  – May 2024 SN74LVC125A-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Description
  4. 3 Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Thermal Information
    5. 4.5 Electrical Characteristics
    6. 4.6 Switching Characteristics
    7. 4.7 Operating Characteristics
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
      2. 7.2.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
  • PW|14
  • BQA|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Pin Configuration and Functions

SN74LVC125A-Q1 D Package, 14-Pin SOIC; PW Package, TSSOP-14 PIN (Top View)Figure 3-1 D Package, 14-Pin SOIC; PW Package, TSSOP-14 PIN (Top View)
SN74LVC125A-Q1 BQA Package, 14-Pin WQFN (Top View)Figure 3-2 BQA Package, 14-Pin WQFN (Top View)
Table 3-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO.
1OE 1 Input Output Enable
1A 2 Input Input A
1Y 3 Output Output Y
2OE 4 Input Output Enable
2A 5 Input Input A
2Y 6 Output Output Y
GND 7 — Ground
3Y 8 Output Output Y
3A 9 Input Input A
3OE 10 Input Output Enable
4Y 11 Output Output Y
4A 12 Input Input A
4OE 13 Input Output Enable
VCC 14 — Positive Supply