SLASFD7 April   2024 TAS2505A-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  I2S/LJF/RJF Timing in Master Mode
    7. 5.7  I2S/LJF/RJF Timing in Slave Mode
    8. 5.8  DSP Timing in Master Mode
    9. 5.9  DSP Timing in Slave Mode
    10. 5.10 I2C Interface Timing
    11. 5.11 SPI Interface Timing
    12. 5.12 Typical Characteristics
      1. 5.12.1 Class D Speaker Driver Performance
      2. 5.12.2 HP Driver Performance
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Audio Analog I/O
      2. 7.3.2 Audio DAC and Audio Analog Outputs
      3. 7.3.3 DAC
      4. 7.3.4 POR
      5. 7.3.5 CLOCK Generation and PLL
      6. 7.3.6 Speaker Driver
      7. 7.3.7 Automotive Diagnostics
    4. 7.4 Device Functional Modes
      1. 7.4.1 Digital Pins
      2. 7.4.2 Analog Pins
      3. 7.4.3 Multifunction Pins
      4. 7.4.4 Analog Signals
        1. 7.4.4.1 Analog Inputs AINL and AINR
      5. 7.4.5 DAC Processing Blocks — Overview
      6. 7.4.6 Digital Mixing and Routing
      7. 7.4.7 Analog Audio Routing
      8. 7.4.8 5V LDO
      9. 7.4.9 Digital Audio and Control Interface
        1. 7.4.9.1 Digital Audio Interface
        2. 7.4.9.2 Control Interface
          1. 7.4.9.2.1 I2C Control Mode
          2. 7.4.9.2.2 SPI Digital Interface
        3. 7.4.9.3 Device Special Functions
    5. 7.5 Register Map
  9. 8 Register Map
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Typical Configuration
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Circuit Configuration With Internal LDO
        1. 9.2.2.1 Design Requirements
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
      3. 9.4.3 Thermal Pad
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
    8. 10.8 Community Resources
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

At 25°C, AVDD = 1.8V, IOVDD = 1.8V, SPKVDD = 3.6V, DVDD = 1.8V, fS (audio) = 48kHz, CODEC_CLKIN = 256 × fS, PLL = Off
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
INTERNAL OSCILLATOR—RC_CLK
Oscillator frequency8.48MHz
DAC DIGITAL INTERPOLATION FILTER CHARACTERISTICS
See TAS2505 Application Reference Guide (SLAU472) for DAC interpolation filter characteristics.
DAC OUTPUT TO CLASS-D SPEAKER OUTPUT; LOAD = 4Ω (DIFFERENTIAL)
ICNIdle channel noiseBTL measurement, class-D gain = 6dB, Measured as idle-channel noise, A-weighted(2) (1)37μVms
Output voltageBTL measurement, class-D gain = 6dB, –3dBFS input1.4Vrms
THD+NTotal harmonic distortion + noiseBTL measurement, DAC input = –6dBFS, class-D gain = 6dB–73.9dB
PSRRPower-supply rejection ratioBTL measurement, ripple on SPKVDD = 200mVPP at 1kHz55dB
Mute attenuationMute103dB
POMaximum output powerSPKVDD = 3.6V, BTL measurement, CM = 0.9V, class-D gain = 18dB, THD = 10%1.1W
SPKVDD = 4.2V, BTL measurement, CM = 0.9V, class-D gain = 18dB, THD = 10%1.4
SPKVDD = 3.6V, BTL measurement, CM = 0.9V, class-D gain = 18dB, THD = 1%0.8
SPKVDD = 4.2V, BTL measurement, CM = 0.9V, class-D gain = 18dB, THD = 1%1.1
SPKVDD = 5.5V, BTL measurement, CM = 0.9V, class-D gain = 18dB2
DAC OUTPUT TO CLASS-D SPEAKER OUTPUT; LOAD = 8Ω (DIFFERENTIAL)
ICNIdle channel noiseBTL measurement, class-D gain = 6dB, measured as idle-channel noise, A-weighted(2) (1)35.2μVms
Output voltageBTL measurement, class-D gain = 6dB, –3dBFS input1.4Vrms
THD+NTotal harmonic distortion + noiseBTL measurement, DAC input = –6dBFS, class-D gain = 6dB–73.6dB
POMaximum output powerSPKVDD = 3.6V, BTL measurement, CM = 0.9V, class-D gain = 18dB, THD = 10%0.7W
SPKVDD = 4.2V, BTL measurement, CM = 0.9V, class-D gain = 18dB, THD = 10%1
SPKVDD = 5.5V, BTL measurement, CM = 0.9V, class-D gain = 18dB, THD = 10%1.7
SPKVDD = 3.6V, BTL measurement, CM = 0.9V, class-D gain = 18dB, THD = 1%0.5
SPKVDD = 4.2V, BTL measurement, CM = 0.9V, class-D gain = 18dB, THD = 1%0.8
SPKVDD = 5.5V, BTL measurement, CM = 0.9V, class-D gain = 18dB, THD = 1%1.3
ANALOG BYPASS TO CLASS-D SPEAKER AMPLIFIER
Device setupBTL measurement, driver gain = 6dB, load = 4Ω (differential), 50pF, input signal frequency fi = 1KHz
Voltage gainInput common-mode = 0.9V4V/V
Gain error–1dBFS (446mVrms), 1kHz input signal±0.7dB
ICNIdle channel noiseIdle channel, IN1L and IN1R ac-shorted to ground, measured as idle-channel noise, A-weighted(2) (1)32.6μVms
THD+NTotal harmonic distortion + noise–1dBFS (446mVrms), 1kHz input signal–73.7dB
SHUTDOWN POWER CONSUMPTION
Device setupPower down POR, /RST held low, AVDD = 1.8V, IOVDD = 1.8V, SPKVDD = 4.2V, DVDD = 1.8V
I(AVDD)1.32µA
I(DVDD)0.04µA
I(IOVDD)0.68µA
I(SPKVDD)2.24µA
DIGITAL INPUT/OUTPUT
Logic familyCMOS
VIHLogic levelIIH = 5μA, IOVDD ≥ 1.6V0.7 × IOVDDV
IIH = 5μA, IOVDD < 1.6VIOVDD
VILIIL = 5μA, IOVDD ≥ 1.6V–0.30.3 × IOVDDV
IIL = 5μA, IOVDD < 1.6V0
VOHIOH = 2 TTL loads0.8 × IOVDDV
VOLIOL = 2 TTL loads0.25V
Capacitive load10pF
(1) All performance measurements were done with a 20kHz low-pass filter and, where noted, an A-weighted filter. Failure to use such a filter may result in higher THD+N and lower SNR and dynamic range readings than shown in the Electrical Characteristics. The low-pass filter removes out-of-band noise, which, although not audible, may affect dynamic specification values.
(2) Ratio of output level with 1kHz full-scale sine-wave input, to the output level with the inputs short-circuited, measured A-weighted over a 20Hz to 20kHz bandwidth using an audio analyzer.