SCPS206B March   2014  – November 2019 TCA9543A

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Application Diagram
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Interrupt and Reset Timing Requirements
    9. 6.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 RESET Input
      2. 8.4.2 Power-On Reset
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
    6. 8.6 Register Maps
      1. 8.6.1 Device Address
      2. 8.6.2 Control Register Description
      3. 8.6.3 Control Register Definition
      4. 8.6.4 Interrupt Handling
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power-On Reset Requirements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

The TCA9543A is a dual bidirectional translating switch controlled by the I2C bus. The SCL/SDA upstream pair fans out to two downstream pairs, or channels. Either individual SCn/SDn channel or both channels can be selected, determined by the contents of the programmable control register. Two interrupt inputs (INT1INT0), one for each of the downstream pairs, are provided. One interrupt output (INT) acts as an AND of the two interrupt inputs.

An active-low reset (RESET) input allows the TCA9543A to recover from a situation where one of the downstream I2C buses is stuck in a low state. Pulling RESET low resets the I2C state machine and causes both of the channels to be deselected, as does the internal power-on reset function.

The pass gates of the switches are constructed such that the VCC terminal can be used to limit the maximum high voltage, which will be passed by the TCA9543A. This allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V, or 3.3-V parts can communicate with 5-V parts without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O terminals are 5.5-V tolerant.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TCA9543A TSSOP (14) 5.00 mm × 4.40 mm
SOIC (14) 8.65 mm × 3.91 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.