SLOS265E August   1999  – March 2024 THS4021 , THS4022

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information: THS4021
    5. 5.5 Thermal Information: THS4022
    6. 5.6 Electrical Characteristics: THS4021D and THS4022DGN
    7. 5.7 Electrical Characteristics: THS4021DGN
    8. 5.8 Typical Characteristics: THS4021D and THS4022DGN
    9. 5.9 Typical Characteristics: THS4021DGN
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Offset Nulling
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Driving a Capacitive Load
      2. 7.1.2 General Configuration
    2. 7.2 Power Supply Recommendations
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
        1. 7.3.1.1 General PowerPAD™ Integrated Circuit Package Design Considerations
      2. 7.3.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DGN|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

GUID-20230504-SS0I-PN8B-P8PB-ZVH7DQ2NVXVP-low.svg Figure 4-1 THS4021: D Package, 8-Pin SOIC, or DGN Package, 8-pin HVSSOP (Top View)
Table 4-1 Pin Functions: THS4021
PIN TYPE DESCRIPTION
NAME NO.
IN– 2 Input Inverting input
IN+ 3 Input Noninverting input
NC 5 — No connection
NULL 1, 8 Input Voltage offset adjust
OUT 6 Output Output of amplifier
VCC– 4 — Negative power supply
VCC+ 7 — Positive power supply
GUID-20230504-SS0I-9SX6-VBDS-7XCLJFRSPSRJ-low.svg Figure 4-2 THS4022: DGN Package, 8-pin HVSSOP (Top View)
Table 4-2 Pin Functions: THS4022
PIN TYPE DESCRIPTION
NAME NO.
1IN– 2 Input Channel 1 inverting input
1IN+ 3 Input Channel 1 noninverting input
1OUT 1 Output Channel 1 output
2IN– 6 Input Channel 2 inverting input
2IN+ 5 Input Channel 2 noninverting input
2OUT 7 Output Channel 2 output
VCC– 4 — Negative power supply
VCC+ 8 — Positive power supply