SLOS829A February   2013  – July 2015 THS4532

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Related Products
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = 2.7 V
    6. 7.6 Electrical Characteristics: VS = 5 V
    7. 7.7 Typical Characteristics
      1. 7.7.1 Typical Characteristics: VS = 2.7 V
      2. 7.7.2 Typical Characteristics: VS = 5 V
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Common-Mode Voltage Range
        1. 8.3.1.1 Setting the Output Common-Mode Voltage
      2. 8.3.2 Power Down
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1  Frequency Response and Output Impedance
      2. 9.1.2  Distortion
      3. 9.1.3  Slew Rate, Transient Response, Settling Time, Overdrive, Output Voltage, and Turnon and Turnoff Time
      4. 9.1.4  Common-Mode and Power Supply Rejection
      5. 9.1.5  VOCM Input
      6. 9.1.6  Balance Error
      7. 9.1.7  Single-Supply Operation
      8. 9.1.8  Low-Power Applications and the Effects of Resistor Values on Bandwidth
      9. 9.1.9  Driving Capacitive Loads
      10. 9.1.10 Audio Performance
      11. 9.1.11 Audio On and Off Pop Performance
    2. 9.2 Typical Applications
      1. 9.2.1 SAR ADC Performance: THS5432 and ADS8321 Combined Performance
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Audio ADC Driver Performance: THS5432 and PCM4204 Combined Performance
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 SAR ADC Performance: THS5432 and ADS7945 Combined Performance
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curve
    3. 9.3 Systems Examples
      1. 9.3.1 Differential-Input to Differential-Output Amplifier
        1. 9.3.1.1 AC-Coupled, Differential-Input to Differential-Output Design Issues
      2. 9.3.2 Single-Ended to Differential FDA Configuration
        1. 9.3.2.1 Input Impedance
      3. 9.3.3 Single-Ended Input to Differential Output Amplifier
        1. 9.3.3.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
        2. 9.3.3.2 DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversion
        3. 9.3.3.3 Resistor Design Equations for the Single-Ended to Differential Configuration of the FDA
      4. 9.3.4 Differential Input to Single-Ended Output Amplifier
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings(1)

MIN MAX UNIT
Supply voltage, VS– to VS+ 5.5 V
Input/output voltage, VIN±, VOUT±, and VOCM pins (VS–) – 0.7 (VS+) + 0.7 V
Differential input voltage, VID 1 V
Continuous output current, IO 50 mA
Continuous input current, Ii 0.75 mA
Continuous power dissipation See Thermal Information
Maximum junction temperature, TJ 150 °C
Operating junction temperature, TJ –40 125 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2500 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VS+ Single-supply voltage 2.7 5 5.4 V
TA Ambient temperature –40 25 125 °C

7.4 Thermal Information

THERMAL METRIC (1) THS4532 UNIT
TSSOP (PW)
16 PINS
RθJA Junction-to-ambient thermal resistance 122.4 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 61.2
RθJB Junction-to-board thermal resistance 66.7
ψJT Junction-to-top characterization parameter 14.4
ψJB Junction-to-board characterization parameter 66.2
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics: VS = 2.7 V

Test conditions at TA = 25°C, VS+ = 2.7 V, VS– = 0 V, VOCM = +VS/2, VOUT = 2 VPP, RF = 2 kΩ, RL = 2 kΩ differential, G = 1 V/V, single-ended input, differential output, and input and output referenced to mid-supply, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TEST
LEVEL(1)
AC PERFORMANCE
Small-signal bandwidth VOUT = 100 mVPP, G = 1 34 MHz C
VOUT = 100 mVPP, G = 2 16
VOUT = 100 mVPP, G = 5 6
VOUT = 100 mVPP, G = 10 2.7
Gain-bandwidth product VOUT = 100 mVPP, G = 10 27 MHz
Large-signal bandwidth VOUT = 2 VPP, G = 1 34 MHz
Bandwidth for 0.1-dB flatness VOUT = 2 VPP, G = 1 12 MHz
Slew rate, rise/fall, 25% to 75% VOUT = 2-V step 190/320 V/µs
Rise/fall time, 10% to 90% 5.2/6.1 ns
Settling time to 1%, rise/fall 25/20 ns
Settling time to 0.1%, rise/fall 60/60
Settling time to 0.01%, rise/fall 150/110 ns
Overshoot/undershoot, rise/fall 1/1%
2nd-order harmonic distortion f = 1 kHz, VOUT = 1 VRMS –122 dBc
f = 10 kHz –127
f = 1 MHz –59
3rd-order harmonic distortion f = 1 kHz, VOUT = 1 VRMS –130 dBc
f = 10 kHz –135
f = 1 MHz –70
2nd-order intermodulation distortion f = 1 MHz, 200-kHz tone spacing,
VOUT envelope = 2 VPP		 –83 dBc
3rd-order intermodulation distortion –81
Input voltage noise f = 1 kHz 10 nV/√Hz
Voltage noise 1/f corner frequency 45 Hz
Input current noise f = 100 kHz 0.25 pA/√Hz
Current noise 1/f corner frequency 6.5 kHz
Overdrive recovery time Overdrive = 0.5 V 65 ns
Output balance error VOUT = 100 mV, f = 1 MHz –65 dB
Closed-loop output impedance f = 1 MHz (differential) 2.5 Ω
Channel-to-channel crosstalk f = 10 kHz, measured differentially -133 dB
DC PERFORMANCE
Open-loop voltage gain (AOL) 100 113 dB A
Input-referred offset voltage TA = 25°C ±80 ±400 µV A
TA = 0°C to 70°C ±715 B
TA = –40°C to 85°C ±855
TA = –40°C to 125°C ±1300
Input offset voltage drift(2) TA = 0°C to 70°C ±2 ±7 µV/°C B
TA = –40°C to 85°C ±2 ±7
TA = –40°C to 125°C ±3 ±9
Input bias current TA = 25°C 200 250 nA A
TA = 0°C to 70°C 275 B
TA = –40°C to 85°C 286
TA = –40°C to 125°C 305
Input bias current drift(2) TA = 0°C to 70°C 0.45 0.55 nA/°C B
TA = –40°C to 85°C 0.45 0.55
TA = –40°C to 125°C 0.45 0.55
Input offset current TA = 25°C ±5 ±50 nA A
TA = 0°C to 70°C ±55 B
TA = –40°C to 85°C ±57
TA = –40°C to 125°C ±60
Input offset current drift(2) TA = 0°C to 70°C ±0.03 ±0.1 nA/°C B
TA = –40°C to 85°C ±0.03 ±0.1
TA = –40°C to 125°C ±0.03 ±0.1
INPUT
Common-mode input low TA = 25°C, CMRR > 87 dB VS– – 0.2 VS– V A
TA = –40°C to 125°C, CMRR > 87 dB VS– – 0.2 VS– B
Common-mode input high TA = 25°C, CMRR > 87 dB VS+ – 1.2 VS+ – 1.1 V A
TA = –40°C to 125°C, CMRR > 87 dB VS+ – 1.2 VS+ – 1.1 B
Common-mode rejection ratio 90 116 dB A
Input impedance common-mode 200 || 1.2 kΩ || pF C
Input impedance differential mode 200 || 1 C
OUTPUT
Single-ended output voltage: low TA = 25°C VS– + 0.06 VS– + 0.2 V A
TA = –40°C to 125°C VS– + 0.06 VS– + 0.2 B
Single-ended output voltage: high TA = 25°C VS+ – 0.2 VS+ – 0.11 V A
TA = –40°C to 125°C VS+ – 0.2 VS+ – 0.11 B
Output saturation voltage: high/low 110/60 mV C
Linear output current drive TA = 25°C ±15 ±22 mA A
TA = –40°C to 125°C ±15 B
POWER SUPPLY
Specified operating voltage 2.5 5.5 V B
Quiescent operating current/ch TA = 25°C, PD = VS+ 230 330 µA A
TA = –40°C to 125°C, PD = VS+ 270 370 B
Power-supply rejection (PSRR) 87 108 dB A
POWER DOWN
Enable voltage threshold Specified on above 2.1 V 2.1 V A
Disable voltage threshold Specified off below 0.7 V 0.7 V A
Disable pin bias current PD = VS– + 0.5 V 50 500 nA A
Power-down quiescent current PD = VS– + 0.5 V 0.5 2 µA A
Turn-on time delay Time from PD = high to VOUT = 90% of final value, RL= 200 Ω 650 ns C
Turn-off time delay Time from PD = low to VOUT = 10% of original value, RL= 200 Ω 20 ns C
OUTPUT COMMON-MODE VOLTAGE CONTROL (VOCM)
Small-signal bandwidth VOCM input = 100 mVPP 23 MHz C
Slew rate VOCM input = 1 VSTEP 14 V/µs C
Gain 0.99 0.996 1.01 V/V A
Common-mode offset voltage Offset = output common-mode voltage – VOCM input voltage ±1 ±5 mV A
VOCM input bias current VOCM = (VS+ – VS–)/2 ±20 ±100 nA A
VOCM input voltage range 0.8 0.75 to 1.9 1.75 V A
VOCM input impedance 100 || 1.6 kΩ || pF C
Default voltage offset from
(VS+ – VS–)/2		 Offset = output common-mode voltage – (VS+ – VS–)/2 ±3 ±10 mV A
(1) Test levels (all values set by characterization and simulation): (A) 100% tested at +25°C; over temperature limits by characterization and simulation. (B) Not tested in production; limits set by characterization and simulation. (C) Typical value only for information.
(2) Input offset voltage drift, input bias current drift, and input offset current drift are average values calculated by taking data at the end points, computing the difference, and dividing by the temperature range.
Node set to midsupply externally; 0.1 µF

7.6 Electrical Characteristics: VS = 5 V

Test conditions at TA = +25°C, VS+ = 5 V, VS– = 0 V, VOCM = open, VOUT = 2 VPP, RF = 2 kΩ, RL = 2 kΩ differential, G = 1 V/V, single-ended input, differential output, and input and output referenced to mid-supply, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TEST
LEVEL(1)
AC PERFORMANCE
Small-signal bandwidth VOUT = 100 mVPP, G = 1 36 MHz C
VOUT = 100 mVPP, G = 2 17
VOUT = 100 mVPP, G = 5 6
VOUT = 100 mVPP, G = 10 2.7
Gain-bandwidth product VOUT = 100 mVPP, G = 10 27 MHz
Large-signal bandwidth VOUT = 2 VPP, G = 1 36 MHz
Bandwidth for 0.1-dB flatness VOUT = 2 VPP, G = 1 15 MHz
Slew rate, rise/fall, 25% to 75% VOUT = 2 VStep 220/390 V/µs
Rise/fall time, 10% to 90% 4.6/5.6 ns
Settling time to 1%, rise/fall 25/20 ns
Settling time to 0.1%, rise/fall 60/60 ns
Settling time to 0.01%, rise/fall 150/110 ns
Overshoot/undershoot, rise/fall 1/1%
2nd-order harmonic distortion f = 1 kHz, VOUT = 1 VRMS –122 dBc
f = 10 kHz –128
f = 1 MHz –60
3rd-order harmonic distortion f = 1 kHz, VOUT = 1 VRMS –130 dBc
f = 10 kHz –137
f = 1 MHz –71
2nd-order intermodulation distortion f = 1 MHz, 200-kHz tone spacing,
VOUT envelope = 2 VPP		 –85 dBc
3rd-order intermodulation distortion –83 dBc
Input voltage noise f = 1 kHz 10 nV/√Hz
Voltage noise 1/f corner frequency 45 Hz
Input current noise f = 100 kHz 0.25 pA/√Hz
Current noise 1/f corner frequency 6.5 kHz
Overdrive recovery time Overdrive = 0.5 V 65 ns
Output balance error VOUT = 100 mV, f = 1 MHz –67 dB
Closed-loop output impedance f = 1 MHz (differential) 2.5 Ω
Channel-to-channel crosstalk f = 10 kHz, measured differentially -133 dB
DC PERFORMANCE
Open-loop voltage gain (AOL) 100 114 dB A
Input-referred offset voltage TA = 25°C ±80 ±400 µV A
TA = 0°C to 70°C ±715 B
TA = –40°C to 85°C ±855
TA = –40°C to 125°C ±1300
Input offset voltage drift(2) TA = 0°C to 70°C ±2 ±7 µV/°C B
TA = –40°C to 85°C ±2 ±7
TA = –40°C to 125°C ±3 ±9
Input bias current TA = 25°C 200 250 nA A
TA = 0°C to 70°C 279 B
TA = –40°C to 85°C 292
TA = –40°C to 125°C 315
Input bias current drift(2) TA = 0°C to 70°C 0.5 0.65 nA/°C B
TA = –40°C to 85°C 0.5 0.65
TA = –40°C to 125°C 0.5 0.65
Input offset current TA = 25°C ±5 ±50 nA A
TA = 0°C to 70°C ±55 B
TA = –40°C to 85°C ±57
TA = –40°C to 125°C ±60
Input offset current drift(2) TA = 0°C to 70°C ±0.03 ±0.1 nA/°C B
TA = –40°C to 85°C ±0.03 ±0.1
TA = –40°C to 125°C ±0.03 ±0.1
INPUT
Common-mode input: low TA = 25°C, CMRR > 87 dB VS– – 0.2 VS– V A
TA = –40°C to 125°C, CMRR > 87 dB VS– – 0.2 VS– B
Common-mode input: high TA = 25°C, CMRR > 87 dB VS+ – 1.2 VS+ –1.1 V A
TA = –40°C to 125°C, CMRR > 87 dB VS+ – 1.2 VS+ –1.1 B
Common-mode rejection ratio 90 116 dB A
Input impedance common-mode 200 || 1.2 kΩ || pF C
Input impedance differential mode 200 || 1 C
OUTPUT
Linear output voltage: low TA = 25°C VS– + 0.1 VS– + 0.2 V A
TA = –40°C to 125°C VS– + 0.1 VS– + 0.2 V B
Linear output voltage: high TA = 25°C VS+ – 0.25 VS+ – 0.12 V A
TA = –40°C to 125°C VS+ – 0.25 VS+ – 0.12 V B
Output saturation voltage: high/low 120/100 mV C
Linear output current drive TA = 25°C ±15 ±25 mA A
TA = –40°C to 125°C ±15 B
POWER SUPPLY
Specified operating voltage 2.5 5.5 V B
Quiescent operating current/ch TA = 25°C, PD = VS+ 250 350 µA A
TA = –40°C to 125°C, PD = VS+ 290 390 B
Power-supply rejection (PSRR) 87 108 dB A
POWER DOWN
Enable voltage threshold Specified on above 2.1 V 2.1 V A
Disable voltage threshold Specified off below 0.7 V 0.7 V A
Disable pin bias current PD = VS– + 0.5 V 50 500 nA A
Power-down quiescent current PD = VS– + 0.5 V 0.5 2 µA A
Turn-on time delay Time from PD = high to VOUT = 90% of final value, RL= 200 Ω 600 ns C
Turn-off time delay Time from PD = low to VOUT = 10% of original value, RL= 200 Ω 15 ns C
OUTPUT COMMON-MODE VOLTAGE CONTROL (VOCM)
Small-signal bandwidth VOCM input = 100 mVPP 24 MHz C
Slew rate VOCM input = 1 VSTEP 15 V/µs C
Gain 0.99 0.996 1.01 V/V A
Common-mode offset voltage Offset = output common-mode voltage – VOCM input voltage ±1 ±5 mV A
VOCM input bias current VOCM = (VS+ – VS–)/2 ±20 ±120 nA A
VOCM input voltage range 0.95 0.75 to 4.15 4.0 V A
VOCM input impedance 65 || 0.86 kΩ || pF C
Default voltage offset from
(VS+ – VS–)/2		 Offset = output common-mode voltage – (VS+ – VS–)/2 ±3 ±10 mV A
(1) Test levels (all values set by characterization and simulation): (A) 100% tested at +25°C; over temperature limits by characterization and simulation. (B) Not tested in production; limits set by characterization and simulation. (C) Typical value only for information.
(2) Input offset voltage drift, input bias current drift, and input offset current drift are average values calculated by taking data at the end points, computing the difference, and dividing by the temperature range.

7.7 Typical Characteristics

Table 3. Table of Graphs

DESCRIPTION VS = 2.7 V VS = 5 V
Small-signal frequency response Figure 1 Figure 35
Large-signal frequency response Figure 2 Figure 36
Large- and small- signal pulse response Figure 3 Figure 37
Single-ended slew rate vs VOUT step Figure 4 Figure 38
Differential slew rate vs VOUT step Figure 5 Figure 39
Overdrive recovery Figure 6 Figure 40
10-kHz FFT on audio analyzer Figure 7 Figure 41
Harmonic distortion vs Frequency Figure 8 Figure 42
Harmonic distortion vs Output voltage at 1 MHz Figure 9 Figure 43
Harmonic distortion vs Gain at 1 MHz Figure 10 Figure 44
Harmonic distortion vs Load at 1 MHz Figure 11 Figure 45
Harmonic distortion vs VOCM at 1 MHz Figure 12 Figure 46
Two-tone, 2nd and 3rd order intermodulation distortion vs Frequency Figure 13 Figure 47
Single-ended output voltage swing vs Load resistance Figure 14 Figure 48
Single-ended output saturation voltage vs Load current Figure 15 Figure 49
Main amplifier differential output impedance vs Frequency Figure 16 Figure 50
Frequency response vs CLOAD Figure 17 Figure 51
RO vs CLOAD Figure 18 Figure 52
Rejection ratio vs Frequency Figure 19 Figure 53
Crosstalk vs Frequency Figure 20 Figure 54
Turn-on time Figure 21 Figure 55
Turn-off time Figure 22 Figure 56
Input-referred voltage noise and current noise spectral density Figure 23 Figure 57
Main amplifier differential open-loop gain and phase vs Frequency Figure 24 Figure 58
Output balance error vs Frequency Figure 25 Figure 59
VOCM small signal frequency response Figure 26 Figure 60
VOCM large and small signal pulse response Figure 27 Figure 61
VOCM input impedance vs frequency Figure 28 Figure 62
Count vs input offset current Figure 29 Figure 63
Count vs input offset current temperature drift Figure 30 Figure 64
Input offset current vs temperature Figure 31 Figure 65
Count vs input offset voltage Figure 32 Figure 66
Count vs input offset voltage temperature drift Figure 33 Figure 67
Input offset voltage vs temperature Figure 34 Figure 68

7.7.1 Typical Characteristics: VS = 2.7 V

VS+ = 2.7 V, VS– = 0 V, CM = open, VOUT = 2 Vpp, RF = 2 kΩ, RL = 2 kΩ Differential, G = 1V/V, Single-Ended Input, Differential Output, Input and Output Referenced to mid-supply unless otherwise noted.

THS4532 G001_Small-Signal_Frequency_Response.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ VOUT = 100 mVPP
Figure 1. Small-Signal Frequency Response
THS4532 G003_Large-_and_Small-Signal_Pulse_Response.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ
Figure 3. Large- and Small-Signal Pulse Response
THS4532 G053_Diff_Slew_Rate_vs_Vout_Step_RL=200.gif
VS = 2.7 V G = 2 V/V RF = 2 kΩ
RL = 200 Ω
Figure 5. Differential Slew Rate vs VOUT Step
THS4532 G006_10_kHz_Output_Spectrum_on_AP_Analyzer_AP_Load_=_100k.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
RL = 100 Ω VOUT = 4 VPP
Figure 7. 10-kHz FFT On Audio Analyzer
THS4532 G008_Harmonic_Distortion_vs_Output_Voltage_at_1MHz_RF=2k_RL=2k.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ f = 1 MHz
Figure 9. Harmonic Distortion vs Output Voltage at 1 MHz
THS4532 G010_Harmonic_Distortion_vs_Load_at_1MHz_RF=2k.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
VOUT = 2 VPP f = 1 MHz
Figure 11. Harmonic Distortion vs Load at 1 MHz
THS4532 G012_Two-Tone_Second-_and_Third-Order_Intermodulation_Distortion_vs_Frequency_RF=2k_RL=2k.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ VOUT = 2 VPP Envelope
Figure 13. Two-Tone, 2nd and 3rd Order Intermodulation
Distortion vs Frequency
THS4532 G014_Single-Ended_Output_Saturation_Voltage_vs_Load_Current.gif
VS = 2.7 V G = 2 V/V RF = 2 kΩ
Figure 15. Single-Ended Output Saturation Voltage vs Load Current
THS4532 G016_Frequency_Response_vs_CLOAD_RLOAD_=_2k.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ VOUT = 100 mVPP
Figure 17. Frequency Response vs CLOAD
THS4532 G018_Rejection_Ratio_vs_Frequency.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ
Figure 19. Rejection Ratio vs Frequency
THS4532 G019_Turn_on_Time_RF=2k_RL=200.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
RL = 200 Ω VIN = 1 V
Figure 21. Turn-On Time
THS4532 G021_Input-Referred_Voltage_Noise_and_Current_Noise_Spectral_Density.gif
Figure 23. Input-Referred Voltage Noise and Current Noise Spectral Density
THS4532 G023_Output_Balance_Error_vs_Frequency_RF=2k_RL=1k.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ V
Figure 25. Output Balance Error vs Frequency
THS4532 G025_Vocm_Large-_and_Small_Signal_Pulse_Response_RF=2k.png
Figure 27. VOCM Large- and Small Signal Pulse Response
THS4532 Figure 29 IOS at 25C 2_7V.gif
VS = 2.7 V TA = 25°C
Figure 29. THS4532IPW Input Offset Current Histogram
THS4532 Figure 31 IOS Over Temp 2_7V.gif
VS = 2.7 V Channel 1
Figure 31. THS4532IPW Input Offset Current vs Temperature
THS4532 Figure33_VOS_Drift 2_7V.gif
VS = 2.7 V Both Channels
Figure 33. THS4532IPW Input Offset Voltage Temp Drift Histogram
THS4532 G002_Large-Signal_Frequency_Response.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ VOUT = 20 VPP
Figure 2. Large-Signal Frequency Response
THS4532 G004_Slew_Rate_vs_Vout_Step_RL=200.gif
VS = 2.7 V G = 2 V/V RF = 2 kΩ
RL = 200 Ω
Figure 4. Single-Ended Slew Rate vs VOUT Step
THS4532 G005_Overdrive_Recovery.gif
VS = 2.7 V G = 2 V/V RF = 2 kΩ
RL = 2 kΩ
Figure 6. Overdrive Recovery
THS4532 G007_Harmonic_Distortion_vs_Frequency_RF=2k_RL=2k.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ VOUT =2 VPP
Figure 8. Harmonic Distortion vs Frequency
THS4532 G009_Harmonic_Distortion_vs_Gain_at_1MHz_RF=2k_RL=2k.gif
VS = 2.7 V RF = 2 kΩ RL = 2 kΩ
VOUT = 2 VPP f = 1 MHz
Figure 10. Harmonic Distortion vs Gain at 1 MHz
THS4532 G011_Harmonic_Distortion_vs_Vocm_at_1MHz_RF=2k_RL=2k.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ VOUT = 2 VPP f = 1 MHz
Figure 12. Harmonic Distortion VOCM at 1 MHz
THS4532 G013_Single-Ended_Output_Voltage_Swing_vs_Load_Resistance.gif
VS = 2.7 V G = 2 V/V RF = 2 kΩ
Figure 14. Single-Ended Output Voltage Swing vs Load Resistance
THS4532 G015_Main_Amplifier_Differential_Output_Impedance_vs_Frequency.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
VOUT = 100 mVPP
Figure 16. Main Amplifier Differential Output Impedance vs Frequency
THS4532 G017_RO_vs_CLOAD_RLOAD_=_2k.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ
Figure 18. RO vs CLOAD
THS4532 Figure_Crosstalk_2_7V.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ VOUT = 2 VPP
Figure 20. Crosstalk vs Frequency
THS4532 G020_Turn_Off_Time_RF=2k_RL=200.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
RL = 200 Ω
Figure 22. Turn-Off Time
THS4532 G022_Main_Amplifier_Differential_Open-Loop_Gain_and_Phase.gif
Figure 24. Main Amplifier Differential Open-Loop Gain and Phase vs Frequency
THS4532 G024_Vocm_Small-Signal_Frequency_Response_RF=2k.gif
VS = 2.7 V G = 1 V/V RF = 2 kΩ
VOUT = 100 mVPP
Figure 26. VOCM Small-Signal Frequency Response
THS4532 G026_Vocm_Input_Impedance_vs_Frequency.gif
VS = 2.7 V
Figure 28. VOCM Input Impedance vs Frequency
THS4532 Figure30_IOS_Drift2_7V.gif
VS = 2.7 V Both Channels
VOUT = 100 mVPP
Figure 30. THS4532IPW Input Offset Current Temp Drift Histogram
THS4532 Figure 32 VOS at 25C 2_7V.gif
VS = 2.7 V TA = 25°C
Figure 32. THS4532IPW Input Offset Voltage Histogram
THS4532 Figure 34 VOS Over Temp 2_7V.gif
VS = 2.7 V Channel 1
Figure 34. THS4532IPW Input Offset Voltage vs Temperature

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7.7.2 Typical Characteristics: VS = 5 V

VS+ = 5 V, VS– = 0 V, VOCM = open, VOUT = 2 Vpp, RF = 2 kΩ, RL = 2 kΩ Differential, G = 1V/V, Single-Ended Input, Differential Output, Input and Output Referenced to mid-supply, TA = 25°C unless otherwise noted.

THS4532 G027_Small-Signal_Frequency_Response.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ VOUT = 100 mVPP
Figure 35. Small-Signal Frequency Response
THS4532 G029_Large-_and_Small-Signal_Pulse_Response.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ
Figure 37. Large- and Small-Signal Pulse Response
THS4532 G054_Diff_Slew_Rate_vs_Vout_Step_RL=200.gif
VS = 5 V G = 2 V/V RF = 2 kΩ
RL = 200 Ω VOUT = 100 mVPP
Figure 39. Differential Slew Rate vs VOUT Step
THS4532 G032_10_kHz_Output_Spectrum_on_AP_Analyzer_AP_Load_=_100k.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
RL = 100 kΩ VOUT = 8 VPP
Figure 41. 10-kHz FFT On Audio Analyzer
THS4532 G034_Harmonic_Distortion_vs_Output_Voltage_at_1MHz_RF=2k_RL=2k.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ f = 1 MHz
Figure 43. Harmonic Distortion vs Output Voltage at 1 MHz
THS4532 G036_Hamonic_Distortion_vs_Load_at_1MHz_RF=2k.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
VOUT 2 VPP f = 1 MHz
Figure 45. Harmonic Distortion vs Load at 1 MHz
THS4532 G038_Two-Tone_Second-_and_Third-Order_Intermodulation_Distortion_vs_Frequency_RF=2k_RL=2k.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ VOUT = 2 VPP Envelope
Figure 47. Two-Tone, 2nd and 3rd Order Intermodulation
Distortion vs Frequency
THS4532 G040_Single-Ended_Output_Saturation_Voltage_vs_Load_Current.gif
VS = 5 V G = 2 V/V RF = 2 kΩ
Figure 49. Single-Ended Output Saturation Voltage vs Load Current
THS4532 G042_Frequency_Response_vs_CLOAD_RLOAD_=_2k.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ VOUT = 100 mVPP
Figure 51. Frequency Response vs CLOAD
THS4532 G044_Rejection_Ratio_vs_Frequency.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ
Figure 53. Rejection Ratio vs Frequency
THS4532 G045_Turn_on_Time_RF=2k_RL=200.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
RL = 200 Ω VIN = 1 V
Figure 55. Turn-On Time
THS4532 G047_Input-Referred_Voltage_Noise_and_Current_Noise_Spectral_Density.gif
Figure 57. Input-Referred Voltage Noise and Current Noise Spectral Density
THS4532 G049_Output_Balance_Error_vs_Frequency_RF=2k_RL=1k.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ
Figure 59. Output Balance Error vs Frequency
THS4532 G051_Vocm_Large-_and_Small-Signal_Pulse_Response_RF=2k.gif
Figure 61. VOCM Large- and Small Signal Pulse Response
THS4532 Figure 62 IOS at 25C 5V.gif
VS = 5 V TA = 25°C
Figure 63. THS4532IPW Input Offset Current Histogram
THS4532 Figure 64 IOS Over Temp 5V.gif
VS = 5 V Channel 1
Figure 65. THS4532IPW Input Offset Current vs Temperature
THS4532 Figure66_VOS_Drift_5V.gif
VS = 5 V Both Channels
Figure 67. THS4532IPW Input Offset Voltage Temp Drift Histogram
THS4532 G028_Large-Signal_Frequency_Response.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ VOUT = 2 VPP
Figure 36. Large-Signal Frequency Response
THS4532 G030_Slew_Rate_vs_Vout_Step_RL=200.gif
VS = 5 V G = 2 V/V RF = 2 kΩ
RL = 200 Ω
Figure 38. Single-Ended Slew Rate vs VOUT Step
THS4532 G031_Overdrive_Recovery.gif
VS = 5 V G = 2 V/V RF = 2 kΩ
RL = 200 Ω VOUT = 100 mVPP
Figure 40. Overdrive Recovery
THS4532 G033_Harmonic_Distortion_vs_Frequency_RF=2k_RL=2k.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ VOUT = 2VPP
Figure 42. Harmonic Distortion vs Frequency
THS4532 G035_Harmonic_Distortion_vs_Gain_at_1MHz_RF=2k_RL=2k.gif
VS = 5 V RF = 2 kΩ RL = 2 kΩ
VOUT = 2 VPP f = 1 MHz
Figure 44. Harmonic Distortion vs Gain at 1 MHz
THS4532 G037_Harmonic_Distortion_vs_Vocm_at_1MHz_RF=2k_RL=2k.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ VOUT = 2 VPP f = 1 MHz
Figure 46. Harmonic Distortion vs VOCM at 1 MHz
THS4532 G039_Single-Ended_Output_Voltage_Swing_vs_Load_Resistance.gif
VS = 5 V G = 2 V/V RF = 2 kΩ
Figure 48. Single-Ended Output Voltage Swing vs Load Resistance
THS4532 G041_Main_Amplifier_Differential_Output_Impedance_vs_Frequency.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
VOUT = 100 mVPP
Figure 50. Main Amplifier Differential Output Impedance vs Frequency
THS4532 G043_RO_vs_CLOAD_RLOAD_=_2k.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ
Figure 52. RO vs CLOAD
THS4532 Figure_Crosstalk_ 5V.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
RL = 2 kΩ VOUT = 2 VPP
Figure 54. Crosstalk vs Frequency
THS4532 G046_Turn_off_Time_RF=2k_RL=200.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
RL = 200 Ω
Figure 56. Turn-Off Time
THS4532 G048_Main_Amplifier_Differential_Open-Loop_Gain_and_Phase.gif
Figure 58. Main Amplifier Differential Open-Loop Gain and Phase vs Frequency
THS4532 G050_Vocm_Small-Signal_Frequency_Response_RF=2k.gif
VS = 5 V G = 1 V/V RF = 2 kΩ
VOUT = 200 mVPP
Figure 60. VOCM Small-Signal Frequency Response
THS4532 G052_Vocm_Input_Impedance_vs_Frequency.gif
VS = 5 V
Figure 62. VOCM Input Impedance vs Frequency
THS4532 Figure63_IOS_Drift_5V.gif
VS = 5 V Both Channels
Figure 64. THS4532IPW Input Offset Current Temp Drift Histogram
THS4532 Figure 65 VOS at 25C 5V.gif
VS = 5 V TA = 25°C
Figure 66. THS4532IPW Input Offset Voltage Histogram
THS4532 Figure 67 VOS Over Temp 5V.gif
VS = 5 V Channel 1
Figure 68. THS4532IPW Input Offset Voltage vs Temperature