SLOS776A September   2012  – December 2015 THS789

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Host Serial Interface DC Characteristics
    7. 6.7 Host Serial Interface AC Characteristics
    8. 6.8 Power Consumption
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Counter, Latches, Clock Multiplier
      2. 7.3.2 Channels, Interpolator
      3. 7.3.3 FIFO
      4. 7.3.4 Calibration, ALU, Tag, Shifter
      5. 7.3.5 Serial Interface, Temperature, Overhead
    4. 7.4 Device Functional Modes
      1. 7.4.1 Serial-Results Interface
      2. 7.4.2 Resister Map Descriptions for All Channels and Central Register
    5. 7.5 Programming
      1. 7.5.1 Host Processor Bus Interface
        1. 7.5.1.1  Serial Interface
        2. 7.5.1.2  Read vs Write Cycle
        3. 7.5.1.3  Parallel (Broadcast) Write
        4. 7.5.1.4  Address
        5. 7.5.1.5  Data
        6. 7.5.1.6  Reset
        7. 7.5.1.7  Chip ID
        8. 7.5.1.8  Read Operations
        9. 7.5.1.9  Write Operations
        10. 7.5.1.10 Write Operations to Multiple Destinations
      2. 7.5.2 Serial-Results Interface and ALU
        1. 7.5.2.1 Event Latches
        2. 7.5.2.2 FIFO
        3. 7.5.2.3 Result-Interface Operation
        4. 7.5.2.4 Serial Results Latency
        5. 7.5.2.5 TMU Calibration
        6. 7.5.2.6 Temperature Sensor
    6. 7.6 Register Maps
      1. 7.6.1 Register Address Space
      2. 7.6.2 Register Map Detail
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedures
        1. 8.2.2.1 Time Measurement
        2. 8.2.2.2 Output Clock to Data/Strobe Phasing
        3. 8.2.2.3 Master Clock Input and Clock Multiplier
        4. 8.2.2.4 Temperature Measurement and Alarm Circuit
        5. 8.2.2.5 LVDS-Compatible I/Os
        6. 8.2.2.6 LVDS-Compatible Inputs
        7. 8.2.2.7 LVDS-Compatible Outputs
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Revision History

Changes from * Revision (September 2012) to A Revision

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
  • Changed Thermal Information tableGo
  • Updated decoupling capacitor values in Figure 16 Go