SLLSFR9A April   2024  – April 2024 THVD4411

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  ESD Ratings [IEC]
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Thermal Information
    6. 5.6  Power Dissipation
    7. 5.7  Electrical Characteristics
    8. 5.8  Switching Characteristics_RS-485_500kbps
    9. 5.9  Switching Characteristics_RS-485_20Mbps
    10. 5.10 Switching Characteristics, Driver_RS232
    11. 5.11 Switching Characteristics, Receiver_RS232
    12. 5.12 Switching Characteristics_MODE switching
    13. 5.13 Switching Characteristics_RS-485_Termination resistor
    14. 5.14 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Integrated IEC ESD and EFT Protection
      2. 7.3.2 Protection Features
      3. 7.3.3 Receiver Fail-Safe Operation
      4. 7.3.4 Low-Power Shutdown Mode
      5. 7.3.5 On-chip Switchable Termination resistor
      6. 7.3.6 Operational Data Rate
      7. 7.3.7 Integrated Charge Pump for RS-232
    4. 7.4 Device Functional Modes
      1. 7.4.1 RS-485 Functionality
      2. 7.4.2 RS-232 Functionality
      3. 7.4.3 Mode Control
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Data Rate and Bus Length
        2. 8.2.1.2 Stub Length
        3. 8.2.1.3 Bus Loading
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

GUID-20221110-SS0I-TKSK-NHTH-1SHWLKTLRV5Z-low.svg Figure 4-1 24-Pin VQFN Package (RGE)
Top View
Table 4-1 Pin Functions
NAME NO. TYPE DESCRIPTION
V+ 1 Positive charge pump rail
VCC 2 P 3V to 5.5V supply voltage
L1 3 O Logic output (RS-232/RS-485)
L2 4 I Logic input (RS-232/RS-485)
SLR 5 I Slew rate control, internal pull-down. SLR=H enables slow speed (250kbps for RS-232, 500kbps for RS-485)
DIR 6 I RS-485 TX/RX enable/disable. Internal pull-down
MODE0 7 I MODE control pins
MODE1 8 I
VIO 9 P 1.65V to 5.5V logic supply voltage
TERM_TX 10 I 120Ω Termination enable/disable across R1/R2 terminals. Internal Pull down
TERM_RX 11 I 120Ω Termination enable/disable across R3/R4 terminals. Internal Pull down
SHDN 12 I Device enable/disable. Internal pull-down
R4 13 I/O RS-485 inverting receiver input (B)
R3 14 I/O RS-232 driver output or RS-485 non-inverting receiver input (A)
GND(1) 15, 16 G Ground
R2 17 I/O RS-232 receiver input or RS-485 bus pin (Y or A)
R1 18 I/O RS-485 bus pin (Z or B)
VCC 19 P 3V to 5.5V supply voltage
V- 20 Negative charge pump rail
C2- 21 Negative terminal of charge pump capacitor
C1- 22 Negative terminal of charge pump capacitor
C1+ 23 Positive terminal of charge pump capacitor
C2+ 24 Positive terminal of charge pump capacitor
(1) GND pins 15 and 16 must be grounded on PCB.