SNVSB04C March   2019  – December 2021 TLV4021 , TLV4031 , TLV4041 , TLV4051

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
  7. 7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power ON Reset (POR)
      2. 8.4.2 Input (IN)
      3. 8.4.3 Switching Thresholds and Hysteresis (VHYS)
      4. 8.4.4 Output (OUT)
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Monitoring (V+)
      2. 9.1.2 Monitoring a Voltage Other than (V+)
      3. 9.1.3 VPULLUP to a Voltage Other than (V+)
    2. 9.2 Typical Application
      1. 9.2.1 Under-Voltage Detection
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Additional Application Information
        1. 9.2.2.1 Pull-up Resistor Selection
        2. 9.2.2.2 Input Supply Capacitor
        3. 9.2.2.3 Sense Capacitor
    3. 9.3 What to Do and What Not to Do
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4.3 Switching Thresholds and Hysteresis (VHYS)

The TLV40x1 transfer curve is shown in Figure 8-5.

  • VIT+ represents the positive-going input threshold that causes the comparator output to change from a logic low state to a logic high state.
  • VIT- represents the negative-going input threshold that causes the comparator output to change from a logic high state to a logic low state.
  • VHYS represents the difference between VIT+ and VIT- and is 20 mV for TLV40x1Ry and 54 mV for TLV4021S5x.
GUID-C80EDEA8-29D5-4741-852D-E3124732C023-low.gifFigure 8-5 Transfer Curve

VIT+ and VIT- have mV's of variation over temperature. The significant portion of the variation of these parameters is a result of the internal bandgap voltage from which VIT+ and VIT- are derived. The following hysteresis histograms demonstrate the performance of the TLV40x1 hysteresis circuitry. Since the bandgap reference is used to set VIT+ and VIT-, each of these parameters have a tendency to error (track) in the same direction. For example, if VIT+ has a positive 0.5% error, VIT- would have a tendency to have a similar positive percentage error. As a result, the variation of hysteresis will never be equal to the difference of the highest VIT+ value of its range and the lowest VIT- value of its range.

GUID-3EF139D9-7630-4701-A5A0-1A8BB9B676AE-low.gifFigure 8-6 VHYST Histogram (TLV40x1R2, VS=5V)
GUID-F8FB195A-FF1F-47D0-ADB5-1462DADF6B5A-low.gifFigure 8-8 VHYST Histogram (TLV40x1S5, VS=5V)
GUID-FB5E1437-FD1C-4726-8EDD-C1246F3B0CEA-low.gifFigure 8-7 VHYST Histogram (TLV40x1R1, VS=5V)