SLVSET9F September   2018  – February 2023 TPS1663

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Hot Plug-In and In-Rush Current Control
        1. 9.3.1.1 Thermal Regulation Loop
      2. 9.3.2  Undervoltage Lockout (UVLO)
      3. 9.3.3  Overvoltage Protection (OVP)
      4. 9.3.4  Overload and Short Circuit Protection
        1. 9.3.4.1 Overload Protection
        2. 9.3.4.2 Short Circuit Protection
          1. 9.3.4.2.1 Start-Up With Short-Circuit On Output
      5. 9.3.5  Output Power Limiting, PLIM (TPS16632 Only)
      6. 9.3.6  Current Monitoring Output (IMON)
      7. 9.3.7  FAULT Response (FLT)
      8. 9.3.8  Power Good Output (PGOOD)
      9. 9.3.9  IN, P_IN, OUT and GND Pins
      10. 9.3.10 Thermal Shutdown
      11. 9.3.11 Low Current Shutdown Control (SHDN)
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Programming the Current-Limit Threshold R(ILIM) Selection
        2. 10.2.2.2 Undervoltage Lockout and Overvoltage Set Point
        3. 10.2.2.3 Setting Output Voltage Ramp Time (tdVdT)
          1. 10.2.2.3.1 Support Component Selections RPGOOD and C(IN)
      3. 10.2.3 Application Curves
    3. 10.3 System Examples
      1. 10.3.1 Simple 24-V Power Supply Path Protection
    4. 10.4 Power Supply Recommendations
      1. 10.4.1 Transient Protection
    5. 10.5 Layout
      1. 10.5.1 Layout Guidelines
      2. 10.5.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGE|24
  • PWP|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The TPS1663x is an easy-to-use, positive 60-V, 6-A eFuse with a 31-mΩ integrated FET. Protection for the load, source, and eFuse itself are provided along with adjustable features such as accurate overcurrent protection, fast short circuit protection, output slew rate control, overvoltage protection and undervoltage lockout. The TPS16332 device integrates adjustable output power limiting (PLIM) functionality that simplifies and enables compliance to standards such as IEC61010-1 and UL1310. The device also includes adjustable overcurrent functionality. PGOOD can be used for enable and disable control of the downstream DC/DC converters.

A shutdown pin provides external control for enabling and disabling the internal FET, as well as placing the device in a low current shutdown mode. For system status monitoring and downstream load control, the device provides fault and a precise current monitor output. The MODE pin allows flexibility to configure the device between the two current-limiting fault responses (latch off and auto-retry).

The devices are available in a 4-mm × 4-mm 24-pin VQFN package and are specified over a –40°C to +125°C temperature range.

Package Information
PART NUMBER PACKAGE(1) BODY SIZE (NOM)
TPS16630
TPS16632		 VQFN (24) 4.00 mm × 4.00 mm
TPS16630 HTSSOP (20) 6.50 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-5AAF1572-4316-4DF1-8598-2A51D6F2F541-low.gifSimplified Schematic
GUID-DEF224D5-F4A1-403D-948C-0CAFF3ACF8A7-low.pngOutput Power Limiting Performance of TPS16632