SLVSDG7A April   2016  – April 2021 TPS54202H

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed-Frequency PWM Control
      2. 7.3.2  Pulse Skip Mode
      3. 7.3.3  Error Amplifier
      4. 7.3.4  Slope Compensation and Output Current
      5. 7.3.5  Device Enable
      6. 7.3.6  Adjusting Under Voltage Lockout
      7. 7.3.7  Safe Startup into Pre-Biased Outputs
      8. 7.3.8  Voltage Reference
      9. 7.3.9  Adjusting Output Voltage
      10. 7.3.10 Internal Soft-Start
      11. 7.3.11 Bootstrap Voltage (BOOT)
      12. 7.3.12 Overcurrent Protection
        1. 7.3.12.1 High-Side MOSFET Overcurrent Protection
        2. 7.3.12.2 Low-Side MOSFET Overcurrent Protection
      13. 7.3.13 Output Overvoltage Protection (OVP)
      14. 7.3.14 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Eco-mode Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 TPS54202H 8-V to 28-V Input, 5-V Output Converter
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Input Capacitor Selection
        2. 8.2.3.2 Bootstrap Capacitor Selection
        3. 8.2.3.3 Output Voltage Set Point
        4. 8.2.3.4 Enable Pin Setup
        5. 8.2.3.5 Output Filter Components
          1. 8.2.3.5.1 Inductor Selection
          2. 8.2.3.5.2 Output Capacitor Selection
          3. 8.2.3.5.3 Feed-Forward Capacitor
      4. 8.2.4 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Adjusting Under Voltage Lockout

The device implements internal under voltage-lockout (UVLO) circuitry on the VIN pin. The device is disabled when the VIN pin voltage falls below the internal VIN UVLO threshold. The internal VIN UVLO threshold has a hysteresis of 480 mV. To enable the device, connect a pull-up resistor R4 (typical 510 KΩ to limit the quiescent current) to the VIN pin.

If an application requires a higher UVLO threshold on the VIN pin, then the EN pin can be configured as shown in Figure 7-1. When using the external UVLO function, setting the hysteresis at a value greater than 500 mV is recommended.

The EN pin has a pull-down resistance Rpd (typical 1 MΩ), which sets the default state of the pin to disable when no external components are connected. Use Equation 1 and Equation 2 to calculate the values of R4 and R5 for a specified UVLO threshold.

Equation 1. GUID-326F1729-4BEC-4F75-AB37-DD9D031EC3E9-low.gif
Equation 2. GUID-29A1726D-F096-4530-9514-30FA16C52640-low.gif

Where:

Ih = 1 µA
VENrising = 1.28 V
VENfalling = 1.25 V