SLVSEW2A September   2020  – August 2021 TPS54618C-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency PWM Control
      2. 7.3.2  Slope Compensation and Output Current
      3. 7.3.3  Bootstrap Voltage (Boot) and Low Dropout Operation
      4. 7.3.4  Error Amplifier
      5. 7.3.5  Voltage Reference
      6. 7.3.6  Adjusting the Output Voltage
      7. 7.3.7  Enable and Adjusting Undervoltage Lockout
      8. 7.3.8  Soft-Start Pin
      9. 7.3.9  Sequencing
      10. 7.3.10 Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
      11. 7.3.11 Overcurrent Protection
      12. 7.3.12 Frequency Shift
      13. 7.3.13 Reverse Overcurrent Protection
      14. 7.3.14 Synchronize Using the RT/CLK Pin
      15. 7.3.15 Power Good (PWRGD Pin)
      16. 7.3.16 Overvoltage Transient Protection
      17. 7.3.17 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Simple Small Signal Model for Peak Current Mode Control
      2. 7.4.2 Small Signal Model for Frequency Compensation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Step One: Select the Switching Frequency
        2. 8.2.2.2 Step Two: Select the Output Inductor
        3. 8.2.2.3 Step Three: Choose the Output Capacitor
        4. 8.2.2.4 Step Four: Select the Input Capacitor
        5. 8.2.2.5 Step Five: Choose the Soft-Start Capacitor
        6. 8.2.2.6 Step Six: Select the Bootstrap Capacitor
        7. 8.2.2.7 Step Eight: Select Output Voltage and Feedback Resistors
          1. 8.2.2.7.1 Output Voltage Limitations
        8. 8.2.2.8 Step Nine: Select Loop Compensation Components
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation Estimate
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Developmental Support
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Soft-Start Pin

The TPS54618C-Q1 regulates to the lower of the SS/TR pin and the internal reference voltage. A capacitor on the SS/TR pin to ground implements a slow-start time. The TPS54618C-Q1 has an internal pullup current source of 2 μA, which charges the external slow-start capacitor. Equation 4 calculates the required slow-start capacitor value.

Equation 4. GUID-278FDF41-BE99-477F-AC99-4B3F08232656-low.gif

where

  • Tss is the desired slow-start time in ms
  • Iss is the internal slow-start charging current of 2 μA
  • Vref is the internal voltage reference of 0.799 V

If, during normal operation, the VIN goes below UVLO, the EN pin pulls below 1.2 V, or a thermal shutdown event occurs, the TPS54618C-Q1 stops switching. When the VIN goes above UVLO, EN is released or pulled high, or a thermal shutdown is exited, then SS/TR is discharged to below 40 mV before reinitiating a powering-up sequence. The VSENSE voltage follows the SS/TR pin voltage with a 54-mV offset up to 85% of the internal voltage reference. When the SS/TR voltage is greater than 85% on the internal reference voltage, the offset increases as the effective system reference transitions from the SS/TR voltage to the internal voltage reference.