SLVSBQ2D January 2013 – May 2016 TPS61163
PRODUCTION DATA.
As for all switching power supplies, especially those providing high current and using high switching frequencies, layout is an important design step. If layout is not carefully done, the regulator could show instability as well as EMI problems. Therefore, use wide and short traces for high current paths. The input capacitor, C1 in Additional Application Circuits, must be close to the inductor, as well as to the VIN and GND pins in order to reduce the input ripple seen by the device. If possible, choose a higher capacitance value for C1. If the ripple seen at the VIN pin is so large that it affects the boost loop stability or internal circuits operation, TI recommends using R2 and C3 to filter and decouple the noise. In this case, C3 must be placed as close as possible to the VIN and GND pins.
The SW pin carries high current with fast rising and falling edges. Therefore, the connection between the SW pin to the inductor and Schottky diode must be kept as short and wide as possible. The trace between Schottky diode and the output capacitor C2 must also be as short and wide as possible. It is beneficial to have the ground of the output capacitor C2 close to the GND pin because there is a large ground return current flowing between them. When laying out signal grounds, TI recommends using short traces separated from power ground traces, and connected together at a single point close to the GND pin.