SLVSGT4A December   2023  – January 2024 TPS61289

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Bidirectional Operation Configuration
      2. 6.3.2 VCC Power Supply
      3. 6.3.3 VHIGH and VCC Undervoltage Lockout (UVLO)
      4. 6.3.4 Enable and Programmable EN/UVLO
      5. 6.3.5 Switching Frequency
      6. 6.3.6 Programmable Switching Peak and Valley Current Limit
      7. 6.3.7 External Clock Synchronization
      8. 6.3.8 VHIGH Overvoltage Protection
      9. 6.3.9 Thermal Shutdown
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Bootstrap Capacitor Selection
        2. 7.2.2.2 Inductor Selection
        3. 7.2.2.3 MOSFET Selection
        4. 7.2.2.4 VLOW/VHIGH Output Capacitor Selection
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
        1. 7.4.2.1 Thermal Considerations
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.6 Programmable Switching Peak and Valley Current Limit

The TPS61289 has an internal cycle-by-cycle current limit to prevent the inadvertent application of a large switching current.

In boost mode, the TPS61289 adopts a cycle-by-cycle valley current limit method. Current limit detection occurs during the off-time by sensing of the voltage drop across the integrated high-side MOSFET. The high-side MOSFET is turned off immediately as soon as the switch valley current triggers the limit threshold. The switch valley current limit can be set by a resistor from the ILIM pin to ground. The relationship between the valley current limit and the resistor is shown in Equation 3.

Equation 3. I V a l l e y A = 400 k R L I M ( K )

where

  • RLIM is the resistance between the ILIM pin and the AGND pin.
  • IValley is the switch valley current limit.

For instance, the valley current limit in boost mode is 20A if the RLIM is 20kΩ. ILIM pin can not be left floating or connected to VCC.

In buck mode, the TPS61289 adopts a cycle-by-cycle peak current limit method. Current limit detection occurs during the on-time by sensing of the voltage drop across the integrated high-side MOSFET. The high-side MOSFET is turned off immediately as soon as the switch peak current triggers the limit threshold. The switch peak current limit can be set by a resistor from the ILIM pin to ground. The relationship between the peak current limit and the resistor is shown in Equation 4.

Equation 4. I P e a k ( A ) = 400 k R L I M ( K )

where

  • RLIM is the resistance between the ILIM pin and the AGND pin.
  • IPeak is the switch peak current limit.

For instance, the peak current limit in buck mode is 20A if the RLIM is 20kΩ. ILIM pin can not be left floating or connected to VCC.