SLVSEE7B June   2018  – January 2021 TPS61372

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout
      2. 7.3.2 Enable and Disable
      3. 7.3.3 Error Amplifier
      4. 7.3.4 Bootstrap Voltage (BST)
      5. 7.3.5 Load Disconnect
      6. 7.3.6 Overvoltage Protection
      7. 7.3.7 Thermal Shutdown
      8. 7.3.8 Start-Up
      9. 7.3.9 Short Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation
      2. 7.4.2 Auto PFM Mode
      3. 7.4.3 Forced PWM Mode
      4. 7.4.4 Mode Selectable
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Setting the Output Voltage
        3. 8.2.2.3 Selecting the Inductor
        4. 8.2.2.4 Selecting the Output Capacitors
        5. 8.2.2.5 Selecting the Input Capacitors
        6. 8.2.2.6 Loop Stability and Compensation
          1. 8.2.2.6.1 Small Signal Model
        7. 8.2.2.7 Loop Compensation Design Steps
        8. 8.2.2.8 Selecting the Bootstrap Capacitor
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YKB|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2.1 Thermal Considerations

Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the power dissipation limits of a given component.

Two basic approaches for enhancing thermal performance are listed below:

• Improving the power dissipation capability of the PCB design

• Improving the thermal coupling of the component to the PCB

As power demand in portable designs is more and more important, designers must figure the best trade-off between efficiency, power dissipation and solution size. Due to integration and miniaturization, junction temperature can increase significantly which could lead to bad application behaviors (that is, premature thermal shutdown or worst case reduce device reliability). Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues in board design. Keep the device operating junction temperature (TJ) below 125°C.