SLVSB70B October   2013  – July 2018 TPS62085 , TPS62086 , TPS62087

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Typical Application Schematic
    1.     Typical Application Efficiency
  5. Revision History
  6. Device Options
  7. Pin Configuration and Functions
    1.     Pin Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Power Save Mode
      2. 9.3.2 100% Duty Cycle Low Dropout Operation
      3. 9.3.3 Soft Start
      4. 9.3.4 Switch Current Limit and Hiccup Short-Circuit Protection
      5. 9.3.5 Undervoltage Lockout
      6. 9.3.6 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Enable and Disable
      2. 9.4.2 Power Good
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Custom Design With WEBENCH® Tools
        2. 10.2.2.2 Setting The Output Voltage
        3. 10.2.2.3 Output Filter Design
        4. 10.2.2.4 Inductor Selection
        5. 10.2.2.5 Capacitor Selection
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
      2. 13.1.2 Custom Design With WEBENCH® Tools
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Related Links
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Layout Guidelines

The printed-circuit-board (PCB) layout is an important step to maintain the high performance of the TPS62085, TPS62086, and TPS62087 devices.

The input and output capacitors and the inductor must be placed as close as possible to the IC. This keeps the traces short. Routing these traces direct and wide results in low trace resistance and low parasitic inductance. The low side of the input and output capacitors must be connected directly to the GND pin to avoid a ground potential shift. The sense traces connected to FB and VOS pins are signal traces. Special care must be taken to avoid noise being induced. By a direct routing, parasitic inductance can be kept small. GND layers might be used for shielding. Keep these traces away from SW nodes. See Figure 22 for the recommended PCB layout.