SLVSDD1G December   2017  – June 2024 TPS62800 , TPS62801 , TPS62802 , TPS62806 , TPS62807 , TPS62808

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Smart Enable and Shutdown (EN)
      2. 7.3.2 Soft Start
      3. 7.3.3 VSEL/MODE Pin
        1. 7.3.3.1 Output Voltage Selection (R2D Converter)
        2. 7.3.3.2 Mode Selection — Power Save Mode and Forced PWM Operation
      4. 7.3.4 Undervoltage Lockout (UVLO)
      5. 7.3.5 Switch Current Limit and Short Circuit Protection
      6. 7.3.6 Thermal Shutdown
      7. 7.3.7 Output Voltage Discharge
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power Save Mode Operation
      2. 7.4.2 Forced PWM Mode Operation
      3. 7.4.3 100% Mode Operation
      4. 7.4.4 Optimized Transient Performance from PWM-to-PFM Mode Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Input Capacitor Selection
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YKA|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.3.1 Output Voltage Selection (R2D Converter)

The output voltage is set with a single external resistor connected between the VSEL/MODE pin and GND. After the device has been enabled and the control logic as well as the internal reference have been powered up, a R2D (resistor-to-digital) conversion is started to detect the external resistor RVSEL within the regulator start-up delay time, tStartup_delay. An internal current source applies current through the external resistor and an internal ADC reads back the resulting voltage level. Depending on the level, an internal feedback divider network is selected to set the correct output voltage. After this R2D conversion is finished, the current source is turned off to avoid current flow through the external resistor.

After power up, the pin is configured as an input for mode selection. Therefore, the output voltage is set only once. If the mode selection function is used in combination with the VSEL function, make sure that there is no additional current path or capacitance greater than 30 pF total to GND during R2D conversion. Otherwise, the additional current to GND is interpreted as a lower resistor value and a false output voltage is set. Table 5-2 lists the correct resistor values for RVSEL to set the appropriate output voltages. The R2D converter is designed to operate with resistor values out of the E96 table and requires 1% resistor value accuracy. The external resistor, RVSEL, is not a part of the regulator feedback loop and has therefore no impact on the output voltage accuracy. Make sure that there is no other leakage path than the RVSEL resistor at the VSEL/MODE pin during an undervoltage lockout event. Otherwise, a false output voltage is set.

Connecting VSEL/MODE to GND selects a pre-defined output voltage.

  • TPS62800 = 0.7 V
  • TPS62801 = 1.2 V
  • TPS62802 = 1.8 V
  • TPS62806 = 0.7 V
  • TPS62807 = 1.2 V
  • TPS62808 = 1.8 V

In this case, no external resistor is needed, which enables a smaller solution size.