SLVS849C July   2008  – September 2017 TPS65100-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Main Boost Converter
      2. 7.3.2 VCOM Buffer
      3. 7.3.3 Positive Charge Pump
      4. 7.3.4 Negative Charge Pump
      5. 7.3.5 Linear Regulator Controller
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable and Power-ON Sequencing (EN, ENR)
      2. 7.4.2 Soft Start
      3. 7.4.3 Fault Protection
      4. 7.4.4 Thermal Shutdown
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Supply for a Typical Approximately 7-inch Display
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Boost Converter Design Procedure
            1. 8.2.1.2.1.1 Inductor Selection
            2. 8.2.1.2.1.2 Output Capacitor Selection
            3. 8.2.1.2.1.3 Input Capacitor Selection
            4. 8.2.1.2.1.4 Rectifier Diode Selection
            5. 8.2.1.2.1.5 Converter Loop Design and Stability
            6. 8.2.1.2.1.6 Design Procedure Quick Steps
            7. 8.2.1.2.1.7 Setting the Output Voltage and Selecting the Feedforward Capacitor
          2. 8.2.1.2.2 Negative Charge Pump
          3. 8.2.1.2.3 Positive Charge Pump
            1. 8.2.1.2.3.1 Voltage Doubler Mode
            2. 8.2.1.2.3.2 Voltage Tripler Mode
          4. 8.2.1.2.4 VCOM Buffer
          5. 8.2.1.2.5 Linear Regulator Controller
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Supply for a Typical Approximately 8-inch Display
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

PWP Package
24-Pin TSSOP
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
BASE 3 O Base drive output for the external transistor
C1+ 16 — Positive terminal of the charge pump flying capacitor
C1– 17 — Negative terminal of the charge pump flying capacitor
C2+ 14 — Positive terminal for the charge pump flying capacitor. If the device runs in voltage doubler mode, this pin should be left open.
C2–/MODE 15 — Negative terminal of the charge pump flying capacitor and charge pump MODE pin. If the flying capacitor is connected to this pin, the converter operates in a voltage tripler mode. If the charge pump needs to operate in a voltage doubler mode, the flying capacitor is removed and the C2–/MODE pin should be connected to GND.
COMP 22 — Compensation pin for the main boost converter. A small capacitor is connected to this pin.
DRV 18 O External charge pump driver
EN 24 I Enable pin of the device. This pin should be terminated and not be left floating. A logic high enables the device and a logic low shuts down the device.
ENR 23 I Enable pin of the linear regulator controller. This pin should be terminated and not be left floating. Logic high enables the regulator and a logic low puts the regulator in shutdown.
FB1 1 I Feedback pin of the boost converter
FB2 21 I Feedback pin of negative charge pump
FB3 12 I Feedback pin of positive charge pump
FB4 2 I Feedback pin of the linear regulator controller. The linear regulator controller is set to a fixed output voltage of 3.3 V or 3 V depending on the version.
OUT3 13 PWR Positive charge pump output
REF 20 O Internal reference output typically 1.23 V
SUP 9 I Supply of the positive and negative charge pump, boost converter gate-drive circuit, and VCOM buffer. Should be connected to the output of the main boost converter and cannot be connected to any other voltage source. For performance reasons, do not connect a bypass capacitor directly to this pin.
SW 5, 6 PWR Switch pin of the boost converter
VCOM 10 PWR VCOM buffer output
VCOMIN 11 I Positive input terminal of the VCOM buffer. When the VCOM buffer is not used, this terminal can be connected to GND to reduce the overall quiescent current of the IC.
VIN 4 PWR Input voltage pin of the device
GND 19 GND Connect this pin to common ground plane under the thermal power pad.
PGND 7, 8 GND Power ground
Thermal pad — GND The exposed PowerPAD should be connected to the power ground (PGND).