SLVSC70B January   2015  – January 2022 TPS65251-1 , TPS65251-2 , TPS65251-3

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics for Buck 1
    7. 6.7 Typical Characteristics for Buck 2
    8. 6.8 Typical Characteristics for Buck 3
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjustable Switching Frequency
      2. 7.3.2  Synchronization
      3. 7.3.3  Out-of-Phase Operation
      4. 7.3.4  Delayed Start-Up
      5. 7.3.5  Soft-Start Time
      6. 7.3.6  Adjusting the Output Voltage
      7. 7.3.7  Input Capacitor
      8. 7.3.8  Bootstrap Capacitor
      9. 7.3.9  Error Amplifier
      10. 7.3.10 Slope Compensation
      11. 7.3.11 Power Good
      12. 7.3.12 3.3-V and 6.5-V LDO Regulators
      13. 7.3.13 Current Limit Protection
      14. 7.3.14 Overvoltage Transient Protection (OVP)
      15. 7.3.15 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Low-Power/Pulse Skipping Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Loop Compensation Circuit
        2. 8.2.2.2  Selecting the Switching Frequency
        3. 8.2.2.3  Output Inductor Selection
        4. 8.2.2.4  Output Capacitor
        5. 8.2.2.5  Input Capacitor
        6. 8.2.2.6  Soft-Start Capacitor
        7. 8.2.2.7  Bootstrap Capacitor Selection
        8. 8.2.2.8  Adjustable Current Limiting Resistor Selection
        9. 8.2.2.9  Output Voltage and Feedback Resistors Selection
        10. 8.2.2.10 Compensation
        11. 8.2.2.11 3.3-V and 6.5-V LDO Regulators
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Low-Power/Pulse Skipping Operation

When a synchronous buck converter operates at light load or standby conditions, the switching losses are the dominant source of power losses. Under these load conditions, TPS65251-x uses a pulse skipping modulation technique to reduce the switching losses by keeping the power transistors in the off-state for several switching cycles, while maintaining a regulated output voltage. Figure 7-4 shows the output voltage and load plus the inductor current.

GUID-336B7FBE-7CC5-4494-AC76-805114740842-low.gifFigure 7-4 Low Power/Pulse Skipping

During the burst mode, the converter continuously charges up the output capacitor until the output voltage reaches a certain limit threshold. The operation of the converter in this interval is equivalent to the peak inductor current mode control. In each switch period, the main switch is turned on until the inductor current reaches the peak current limit threshold. As the load increases, the number of pulses increases to make sure that the output voltage stays within regulation limits. When the load is very light, the low-power controller has a zero crossing detector to allow the low-side MOSFET to operate even in light load conditions. The transistor is not disabled at light loads. A zero crossing detection circuit disables it when inductor current reverses. During the whole process, the body diode does not conduct, but is used as blocking diode only.

During the skipping interval, the upper and lower transistors are turned off and the converter stays in idle mode. The output capacitors are discharged by the load current until the moment when the output voltage drops to a low threshold.

The choice of output filter influences the performance of the low-power circuit. The maximum ripple during low-power mode can be calculated as:

Equation 4. GUID-9ECFDAE9-3936-4A74-A0B9-2D4C28DF48F8-low.gif

where

  • KRIP is 1.4 for Buck 1.
  • KRIP is 0.7 for Buck 2 and Buck 3.

TS can be calculated as:

Equation 5. GUID-04081395-E491-4BD0-9618-0E1C03DA9F2D-low.gif