SBVS116D Data sheet | TI.com

SBVS116D December 2008 – November 2023 TPS714

PRODUCTION DATA

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)

DCK|5
DRV|6

Thermal pad, mechanical data (Package|Pins)

DRV|6
- QFND087M

Orderable Information

5.6 Typical Characteristics

at operating temperature T_J = 25°C, V_IN = V_OUT(NOM) + 1.0 V or 2.5 V (whichever is greater), I_OUT = 1 mA, C_IN = 1 µF, and C_OUT = 1 µF (unless otherwise noted)

Figure 5-1 TPS71433 Output Voltage vs Output Current
(Legacy Chip)

Figure 5-3 TPS71433 Output Voltage vs Input Voltage
(New Chip)

Figure 5-5 TPS71433 Output Voltage vs Junction Temperature (New Chip)

Figure 5-7 TPS71433 Quiescent Current vs Junction Temperature (New Chip)

Figure 5-9 TPS71433 Quiescent Current vs Load Current
(New Chip)

Figure 5-11 TPS71433 Dropout Voltage vs Output Current
(New Chip)

Figure 5-13 TPS71433 Dropout Voltage vs Junction Temperature (New Chip)

Figure 5-15 TPS71433 Output Spectral Noise Density vs Frequency (Legacy Chip)

Figure 5-17 TPS71433 Output Impedance vs Frequency (Legacy Chip)

Figure 5-19 TPS71433 V_OUT vs Current Limit (New Chip)

Figure 5-21 TPS71433 Power-Supply Ripple Rejection vs Frequency (Legacy Chip)

Figure 5-23 TPS71433 Power-Up, Power-Down (Legacy Chip)

Figure 5-25 TPS71433 Fast Power-Up (Legacy Chip)

Figure 5-27 TPS71433 Line Transient Response (Legacy Chip)

Figure 5-29 TPS71433 Load Transient Response (Legacy Chip)

Figure 5-2 TPS71433 Output Voltage vs Output Current
(New Chip)

Figure 5-4 TPS71433 Output Voltage vs Junction Temperature (Legacy Chip)

Figure 5-6 TPS71433 Quiescent Current vs Junction Temperature (Legacy Chip)

Figure 5-8 TPS71433 Quiescent Current vs Input Voltage
(New Chip)

Figure 5-10 TPS71433 Dropout Voltage vs Output Current (Legacy Chip)

Figure 5-12 TPS71433 Dropout Voltage vs Junction Temperature (Legacy Chip)

Figure 5-14 TPS71401 Dropout Voltage vs Input Voltage
(New Chip)

Figure 5-16 TPS71433 Output Spectral Noise Density vs Frequency (New Chip)

Figure 5-18 TPS71433 V_OUT vs Current Limit (Legacy Chip)

Figure 5-20 TPS71433 Current Limit vs Junction Temperature (New Chip)

Figure 5-22 TPS71433 Power-Supply Ripple Rejection vs Frequency (New Chip)

Figure 5-24 TPS71433 Power-Up, Power-Down (New Chip)

Figure 5-26 TPS71433 Fast Power-Up (New Chip)

Figure 5-28 TPS71433 Line Transient Response (New Chip)

Figure 5-30 TPS71433 Load Transient Response (New Chip)