SLVS822F March   2009  – April 2024 TPS798-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Dissipation Ratings
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Adjustable Operation
      2. 6.3.2 Output Capacitance and Transient Response
      3. 6.3.3 Calculating Junction Temperature
      4. 6.3.4 Protection Features
    4. 6.4 Device Functional Modes
      1. 6.4.1 Low-Voltage Tracking
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Thermal Considerations
      2. 7.3.2 Thermal Layout Considerations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.1 Adjustable Operation

The TPS798-Q1 has an output voltage range of 1.275V to 28V. The output voltage is set by the ratio of two external resistors as shown in Figure 6-5. The feedback loop monitors the output to maintain the voltage at the adjust pin at 1.275V referenced to ground. The current in R1 is then equal to 1.275V / R1, and the current in R2 is the current in R1 plus the FB pin bias current. The FB pin bias current, 0.2μA at 25°C, flows through R2 into the FB pin. The output voltage can be calculated using the formula in Figure 6-5. The value of R1 must be less than 250kΩ to minimize errors in the output voltage caused by the FB pin bias current. When in shutdown, the output is turned off and the divider current is zero.

GUID-BE58607C-DACF-4E5B-87A8-B4A82C14BEC3-low.gifFigure 6-5 Adjustable Operation

A 100pF capacitor (C1) placed in parallel with the top resistor (R2) of the output divider is necessary for stability and transient performance of the adjustable TPS798-Q1. The impedance of C1 at 10kHz must be less than the value of R2.

The adjustable device is tested and specified with the FB pin tied to the OUT pin and a 1mA DC load (unless otherwise specified) for an output voltage of 1.275V. Specifications for output voltages greater than 1.275V are proportional to the ratio of the desired output voltage to 1.275V (VOUT / 1.275V). For example, load regulation for an output current change of 1mA to 50mA is –10mV (typical) at VOUT = 1.275V.

At VOUT = 12V, load regulation is:

Equation 1. (12V / 1.275V) × (–10mV) = –94mV