SLVS720F June   2008  – November 2015

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Adjustable Operation
      2. 8.3.2 Fixed Operation
      3. 8.3.3 Overload Recovery
      4. 8.3.4 Output Voltage Noise
      5. 8.3.5 Protection Features
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Output Capacitance and Transient Response
    2. 9.2 Typical Applications
      1. 9.2.1 Adjustable Output Operation
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Paralleling Regulators for Higher Output Current
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
      1. 11.3.1 Calculating Junction Temperature
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

over operating virtual-junction temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Input voltage, VIN IN –20 20 V
OUT –20 20
Input-to-output differential (2) –20 20
SENSE –20 20
ADJ –7 7
SHDN –20 20
Output short-circuit duration, tshort Indefinite
Maximum lead temperature (10-s soldering time), Tlead 300 °C
Maximum junction temperature, TJMAX 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to conditions beyond the recommended operating maximum for extended periods may affect device reliability.
(2) Absolute maximum input-to-output differential voltage cannot be achieved with all combinations of rated IN pin and OUT pin voltages. With the IN pin at 20 V, the OUT pin may not be pulled below 0 V. The total measured voltage from IN to OUT can not exceed ±20 V.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) ±2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Pins listed as 2000 V may actually have higher performance.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Pins listed as 1000 V may actually have higher performance.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VIN Input voltage range(1) VOUT + VDO 20 V
VIH SHDN high-level input voltage 2 20 V
VIL SHDN low-level input voltage 0.25 V
TJ Recommended operating junction temperature range –40 125 °C
(1) TPS7A4501, TPS7A4515, and TPS7A4518 may require a higher minimum input voltage under some output voltage/load conditions as indicated under Electrical Characteristics.

7.4 Thermal Information

THERMAL METRIC (1) (2) TPS7A45xx UNIT
KTT (TO-263) DCQ (SOT-223)
5 PINS 6 PINS
RθJA Junction-to-ambient thermal resistance 28.0 50.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 43.0 31.1 °C/W
RθJB Junction-to-board thermal resistance 17.4 5.1 °C/W
ψJT Junction-to-top characterization parameter 3.9 1.0 °C/W
ψJB Junction-to-board characterization parameter 9.4 5.0 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 0.3 — °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.

7.5 Electrical Characteristics

Over recommended operating temperature range TJ = –40 to 125°C (unless otherwise noted) (1)
PARAMETER TEST CONDITIONS TJ MIN TYP (10) MAX UNIT
VIN Minimum input voltage (2) (3) ILOAD = 0.5 A 25°C 1.9 V
ILOAD = 1.5 A Full range 2.1 2.5
VOUT Regulated output voltage (4) TPS7A4515 VIN = 2.21 V, ILOAD = 1 mA 25°C 1.485 1.5 1.515 V
VIN = 2.5 V to 20 V,
ILOAD = 1 mA to 1.5 A		 Full range 1.447 1.5 1.545
TPS7A4518 VIN = 2.3 V, ILOAD = 1 mA 25°C 1.782 1.8 1.818
VIN = 2.8 V to 20 V,
ILOAD = 1 mA to 1.5 A		 Full range 1.737 1.8 1.854
TPS7A4525 VIN = 3 V, ILOAD = 1 mA 25°C 2.475 2.5 2.525
VIN = 3.5 V to 20 V,
ILOAD = 1 mA to 1.5 A		 Full range 2.412 2.5 2.575
TPS7A4533 VIN = 3.8 V, ILOAD = 1 mA 25°C 3.266 3.3 3.333
VIN = 4.3 V to 20 V,
ILOAD = 1 mA to 1.5 A		 Full range 3.2 3.3 3.4
VADJ ADJ pin voltage (2) (4) TPS7A4501 VIN = 2.21 V, ILOAD = 1 mA 25°C 1.197 1.21 1.222 V
VIN = 2.5 V to 20 V,
ILOAD = 1 mA to 1.5 A		 Full range 1.174 1.21 1.246
Line regulation TPS7A4515 ΔVIN = 2.21 V to 20 V,
ILOAD = 1 mA		 Full range 2 6 mV
TPS7A4518 ΔVIN = 2.3 V to 20 V,
ILOAD = 1 mA		 Full range 2.5 7
TPS7A4525 ΔVIN = 3 V to 20 V,
ILOAD = 1 mA		 Full range 3 10
TPS7A4533 ΔVIN = 3.8 V to 20 V,
ILOAD = 1 mA		 Full range 3.5 10
TPS7A4501 (2) ΔVIN = 2.21 V to 20 V,
ILOAD = 1 mA		 Full range 1.5 3
Load regulation TPS7A4515 VIN = 2.5 V,
ΔILOAD = 1 mA to 1.5 A		 25°C 2 9 mV
Full range 18
TPS7A4518 VIN = 2.8 V,
ΔILOAD = 1 mA to 1.5 A		 25°C 2 10
Full range 20
TPS7A4525 VIN = 3.5 V,
ΔILOAD = 1 mA to 1.5 A		 25°C 2.5 15
Full range 30
TPS7A4533 VIN = 4.3 V,
ΔILOAD = 1 mA to 1.5 A		 25°C 3 20
-40 to +85 °C 30
Full range 70
TPS7A4501 (2) VIN = 2.5 V,
ΔILOAD = 1 mA to 1.5 A		 25°C 2 8
-40 to +85 °C 8
Full range 18
VDO Dropout voltage (3) (6) (5)
VIN = VOUT(NOMINAL) 		ILOAD = 1 mA 25°C 0.02 0.05 V
Full range 0.06
ILOAD = 100 mA 25°C 0.085 0.10
Full range 0.13
ILOAD = 500 mA 25°C 0.17 0.180
Full range 0.250
ILOAD = 1.5 A 25°C 0.300 0.350
Full range 0.450
IGND GND pin current (5) (7)
VIN = VOUT(NOMINAL) + 1		 ILOAD = 0 mA Full range 1 1.5 mA
ILOAD = 1 mA Full range 1.1 1.6
ILOAD = 100 mA Full range 3.3 3.5
ILOAD = 500 mA Full range 15 17
ILOAD = 1.5 A Full range 80 90
eN Output voltage noise COUT = 10 μF, ILOAD = 1.5 A,
BW = 10 Hz to 100 kHz		 25°C 35 μVRMS
IADJ ADJ pin bias current (2) (8)   25°C 3 7 μA
Shutdown threshold VOUT = OFF to ON Full range 0.9 2 V
VOUT = ON to OFF Full range 0.25 0.75
I SHDN SHDN pin current V SHDN = 0 V 25°C 0.01 1 μA
V SHDN = 20 V 25°C 3 20
Quiescent current in shutdown VIN = 6 V, V SHDN = 0 V 25°C 0.01 1 μA
Ripple rejection VIN – VOUT = 1.5 V (avg), VRIPPLE = 0.5 VP-P,
fRIPPLE = 120 Hz, ILOAD = 0.75 A		 25°C 68 dB
ILIMIT Current limit VIN = 7 V, VOUT = 0 V 25°C 2 A
VIN = VOUT(NOMINAL) + 1 Full range 1.6
IIL Input reverse leakage current VIN = –20 V, VOUT = 0 V Full range 300 μA
IRO Reverse output current (9) TPS7A4515 VOUT = 1.5 V, VIN < 1.5 V 25°C 600 1000 μA
TPS7A4518 VOUT = 1.8 V, VIN < 1.8 V 25°C 600 1000
TPS7A4525 VOUT = 2.5 V, VIN < 2.5 V 25°C 600 1000
TPS7A4533 VOUT = 3.3 V, VIN < 3.3 V 25°C 600 1000
TPS7A4501 VOUT = 1.21 V, VIN < 1.21 V 25°C 300 500
(1) The TPS7A45xx regulators are tested and specified under pulse load conditions such that TJ ≉ TA. They are fully tested at TA = 25°C. Performance at –40 and 125°C is specified by design, characterization, and correlation with statistical process controls.
(2) The TPS7A4501 is tested and specified for these conditions with the ADJ pin connected to the OUT pin.
(3) For the TPS7A4501, TPS7A4515 and TPS7A4518, dropout voltages are limited by the minimum input voltage specification under some output voltage/load conditions.
(4) Operating conditions are limited by maximum junction temperature. The regulated output voltage specification does not apply for all possible combinations of input voltage and output current. When operating at maximum input voltage, the output current range must be limited. When operating at maximum output current, the input voltage range must be limited.
(5) To satisfy requirements for minimum input voltage, the TPS7A4501 is tested and specified for these conditions with an external resistor divider (two 4.12-kΩ resistors) for an output voltage of 2.4 V. The external resistor divider adds a 300-µA DC load on the output.
(6) Dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage is equal to: VIN – VDROPOUT.
(7) GND pin current is tested with VIN = (VOUT(NOMINAL) + 1 V) and a current source load. The GND pin current decreases at higher input voltages.
(8) ADJ pin bias current flows into the ADJ pin.
(9) Reverse output current is tested with the IN pin grounded and the OUT pin forced to the rated output voltage. This current flows into the OUT pin and out the GND pin.
(10) Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the application and configuration and may vary over time. Typical values are not ensured on production material.

7.6 Typical Characteristics

Typical characteristics apply to all TPS7A45xx devices unless otherwise noted.
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 vdo_iout_lvs719.gif
Figure 1. Dropout Voltage vs Output Current
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 iq_temp_lvs720.gif
VIN = 6 V IOUT = 0 A VSHDN = VIN
Figure 3. Quiescent Current vs Temperature
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 vout_temp_vo2p5_lvs720.gif
IOUT = 1 mA TPS7A4525
Figure 5. TPS7A4525 Output Voltage vs Temperature
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 D020_SLVS720.gif
IOUT = 1 mA VIN = 6 V
Figure 7. TPS7A4501 Output Voltage vs Temperature
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 D022_SLVS720.gif
TJ = 25°C VOUT = 1.21 V
VSHDN = VIN
Figure 9. TPS7A4501 Ground Current vs Input Voltage
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 ignd_vin_vo3p3_il_1_p3_p1_lvs720.gif
TJ = 25°C VSHDN = VIN
Figure 11. TPS7A4533 Ground Current vs Input Voltage
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 ignd_iout_lvs719.gif
VIN = VOUT(nom) + 1
Figure 13. Ground Current vs Output Current
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 ishdn_temp_lvs719.gif
VSHON = 0 V
Figure 15. SHDN Pin Current (ISHDN) vs Temperature
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 shdn_thresh_off_on_lvs719.gif
IOUT = 1 mA
Figure 17. SHDN Threshold (OFF to ON) vs Temperature
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 iadjbias_temp_lvs719.gif
Figure 19. ADJ Bias Current vs Temperature
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 current_lim_vin7v_lvs719.gif
VIN = 7 V VOUT = 0 V
Figure 21. Current Limit vs Temperature
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 irevout_temp_lvs720.gif
VIN = 0 V
Figure 23. Reverse Output Current vs Temperature
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 load_regulation_lvs720.gif
IOUT = 1.5 A
Figure 25. Load Regulation vs Temperature
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 load_trans_resp_il10_500_lvs719.gif
VIN = 4.3 V CIN = 10 µF
COUT = 10 µF (ceramic)
Figure 27. Load Transient Response
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 line_trans_resp_lvs719.gif
IOUT = 1.5 A CIN = 10 µF
COUT = 10 µF (ceramic)
Figure 29. Line Transient Response
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 vdo_temp_lvs719.gif
Figure 2. Dropout Voltage vs Temperature
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 vout_temp_vo1p8_lvs720.gif
IOUT = 1 mA TPS7A4518
Figure 4. TPS7A4518 Output Voltage vs Temperature
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 vout_temp_vo3p3_lvs720.gif
IOUT = 1 mA TPS7A4533
Figure 6. TPS7A4533 Output Voltage vs Temperature
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 D021_SLVS720.gif
TJ = 25°C ROUT = 4.3 kΩ
VSHDN = VIN
Figure 8. Quiescent Current vs Input Voltage
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 igdn_vin_il1p5_1_p5_lvs720.gif
TJ = 25°C VOUT = 1.21 V
VSHDN = VIN
Figure 10. TPS7A4501 Ground Current vs Input Voltage
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 ignd_vin_vo3p3_il_1p5_1_p5_lvs720.gif
TJ = 25°C VSHDN = VIN
Figure 12. TPS7A4533 Ground Current vs Input Voltage
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 TPS7A45xx.gif
VSHDN = 0 V
Figure 14. Quiescent Current in Shutdown vs Input Voltage
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 ishdn_vshdn_lvs719.gif
Figure 16. SHDN Pin Current (ISHDN) vs SHDN Input Voltage
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 shdn_thresh_on_off_lvs719.gif
IOUT = 1 mA
Figure 18. SHDN Threshold (ON to OFF) vs Temperature
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 current_lim_dvo100mv_lvs719.gif
ΔVOUT = 100 mV
Figure 20. Current Limit vs Input-to-Output Differential Voltage
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 irevout_vout_lvs720.gif
TJ = 25°C VIN = 0 V
Current flows into OUT pin
Figure 22. Reverse Output Current vs Output Voltage
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 ripple_rejection_lvs719.gif
VRIPPLE = 0.05 VPP CIN = 0 TA = 25°C
VIN = 2.7 V COUT = 10 µF (ceramic)
Figure 24. Ripple Rejection vs Frequency
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 out_noise_volt_freq_lvs720.gif
COUT = 10 µF (ceramic) IOUT = 1.5 A
Figure 26. Output Noise Voltage vs Frequency
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 load_trans_resp_il1p5_50_lvs719.gif
VIN = 4.3 V CIN = 10 µF
COUT = 10 µF (ceramic)
Figure 28. Load Transient Response