SBVS412A November   2022  – December 2022 TPS7A53A-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable and Shutdown
      2. 7.3.2 Active Discharge
      3. 7.3.3 Power-Good Output (PG)
      4. 7.3.4 Internal Current Limit
      5. 7.3.5 Thermal Shutdown Protection (TSD)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input, Output, and Bias Capacitor Requirements
      2. 8.1.2 Dropout Voltage
      3. 8.1.3 Output Noise
      4. 8.1.4 Estimating Junction Temperature
      5. 8.1.5 Soft Start, Sequencing, and Inrush Current
      6. 8.1.6 Power-Good Operation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Board Layout
        2. 8.4.1.2 RTJ Package — High CTE Mold Compound
      2. 8.4.2 Layout Example
  9. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  10. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RTJ|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Soft Start, Sequencing, and Inrush Current

Soft-start refers to the ramp-up characteristic of the output voltage during LDO turn-on after EN and UVLO achieve threshold voltage. The soft start current is fixed for fixed output voltage versions.

Although the device does not have any sequencing requirement, following the sequencing order of BIAS, IN, and EN makes sure that the soft start starts from zero.

Figure 8-1 shows an example of the device behavior when the EN pin is enabled prior to having either power supply up. Under this condition, the output jumps from 0 V to approximately 0.3 V almost instantly when the IN voltage is sufficient to power the circuit.

GUID-20221202-SS0I-FKDM-JLKT-FX3WT2J1Q9ZX-low.png Figure 8-1 Sequencing and Soft-Start Behavior

As shown in Figure 8-2, connecting EN to IN, in conjunction with a slow input or output voltage ramp, can have undesired behavior in the application. For a smooth IN and OUT ramp, consider using the EN pin separate from the IN voltage.

GUID-20221207-SS0I-VMH2-806J-XJLVJRHKVNPH-low.png Figure 8-2 VEN = VIN Behavior

Inrush current is defined as the current into the LDO at the IN pin during start-up. Inrush current then consists primarily of the sum of load current and the current used to charge the output capacitor. This current is difficult to measure because the input capacitor must be removed, which is not recommended. However, Equation 5 can estimate this soft-start current:

Equation 5. GUID-3CEF2A88-6EE5-4B15-8297-2ED9DF22CB7D-low.gif

where:

  • VOUT(t) is the instantaneous output voltage of the turn-on ramp
  • dVOUT(t) / dt is the slope of the VOUT ramp
  • RLOAD is the resistive load impedance