SLVSDD9 March   2017 TPS92692 , TPS92692-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Internal Regulator and Undervoltage Lockout (UVLO)
      2. 7.3.2  Oscillator
      3. 7.3.3  Spread Spectrum Frequency Modulation
      4. 7.3.4  Gate Driver
      5. 7.3.5  Rail-to-Rail Current Sense Amplifier
      6. 7.3.6  Transconductance Error Amplifier
      7. 7.3.7  Switch Current Sense
      8. 7.3.8  Slope Compensation
      9. 7.3.9  Analog Adjust Input
      10. 7.3.10 DIM/PWM Input
      11. 7.3.11 Series P-Channel FET Dimming Gate Driver Output
      12. 7.3.12 Soft-Start
      13. 7.3.13 Current Monitor Output
      14. 7.3.14 Output Overvoltage Protection
      15. 7.3.15 Output Short-circuit Protection
      16. 7.3.16 Thermal Protection
      17. 7.3.17 Fault Indicator (FLT)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Hiccup Mode Short-circuit Protection
      2. 7.4.2 Fault Indication Mode
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Duty Cycle Considerations
      2. 8.1.2  Inductor Selection
      3. 8.1.3  Output Capacitor Selection
      4. 8.1.4  Input Capacitor Selection
      5. 8.1.5  Main Power MOSFET Selection
      6. 8.1.6  Rectifier Diode Selection
      7. 8.1.7  LED Current Programming
      8. 8.1.8  Switch Current Sense Resistor
      9. 8.1.9  Slope Compensation
      10. 8.1.10 Feedback Compensation
      11. 8.1.11 Soft-Start
      12. 8.1.12 Overvoltage and Undervoltage Protection
      13. 8.1.13 Analog to PWM Dimming Considerations
      14. 8.1.14 Direct PWM Dimming Considerations
      15. 8.1.15 Series P-Channel MOSFET Selection
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Boost LED Driver
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Calculating Duty Cycle
          2. 8.2.1.2.2  Setting Switching Frequency
          3. 8.2.1.2.3  Setting Dither Modulation Frequency
          4. 8.2.1.2.4  Inductor Selection
          5. 8.2.1.2.5  Output Capacitor Selection
          6. 8.2.1.2.6  Input Capacitor Selection
          7. 8.2.1.2.7  Main N-Channel MOSFET Selection
          8. 8.2.1.2.8  Rectifying Diode Selection
          9. 8.2.1.2.9  Programming LED Current
          10. 8.2.1.2.10 Setting Switch Current Limit
          11. 8.2.1.2.11 Programming Slope Compensation
          12. 8.2.1.2.12 Deriving Compensator Parameters
          13. 8.2.1.2.13 Setting Start-up Duration
          14. 8.2.1.2.14 Setting Overvoltage Protection Threshold
          15. 8.2.1.2.15 Analog-to-PWM Dimming Considerations
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical Buck-Boost LED Driver
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1  Calculating Duty Cycle
          2. 8.2.2.2.2  Setting Switching Frequency
          3. 8.2.2.2.3  Setting Dither Modulation Frequency
          4. 8.2.2.2.4  Inductor Selection
          5. 8.2.2.2.5  Output Capacitor Selection
          6. 8.2.2.2.6  Input Capacitor Selection
          7. 8.2.2.2.7  Main N-Channel MOSFET Selection
          8. 8.2.2.2.8  Rectifier Diode Selection
          9. 8.2.2.2.9  Programming LED Current
          10. 8.2.2.2.10 Setting Switch Current Limit and Slope Compensation
          11. 8.2.2.2.11 Programming Slope Compensation
          12. 8.2.2.2.12 Deriving Compensator Parameters
          13. 8.2.2.2.13 Setting Startup Duration
          14. 8.2.2.2.14 Setting Overvoltage Protection Threshold
          15. 8.2.2.2.15 Direct PWM Dimming Consideration
        3. 8.2.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

Application Information

The TPS92692 and TPS92692-Q1 controllers are suitable for implementing step-up or step-down LED driver topologies including boost, buck-boost, SEPIC, and flyback. Use the following design procedure to select component values for the TPS92692-Q1 device. This section presents a simplified discussion of the design process for the boost and buck-boost converter. The expressions derived for the buck-boost topology can be altered to select components for a 1:1 coupled-inductor SEPIC converter. The design procedure can be easily adapted for flyback and similar converter topologies.

TPS92692 TPS92692-Q1 BST2_SLVSDD9.gif Figure 36. Boost LED Driver
TPS92692 TPS92692-Q1 BB_SLVSDD9.gif Figure 37. Buck-Boost LED Driver
TPS92692 TPS92692-Q1 SEPIC_SLVSDD9.gif Figure 38. SEPIC LED Driver

Duty Cycle Considerations

The switch duty cycle, D, defines the converter operation and is a function of the input and output voltages. In steady state, the duty cycle is derived using expression:

Boost:

Equation 9. TPS92692 TPS92692-Q1 EqDBST_SLVSDD9.gif

Buck-Boost:

Equation 10. TPS92692 TPS92692-Q1 EqDBB_SLVSDD9.gif

The minimum duty cycle, DMIN, and maximum duty cycle, DMAX, are calculated by substituting maximum input voltage, VIN(MAX), and the minimum input voltage, VIN(MIN), respectively in the previous expressions. The minimum duty cycle achievable by the device is determined by the leading edge blanking period and the switching frequency. The maximum duty cycle is limited by the internal oscillator to 90% (typ) to allow for minimum off-time. It is necessary for the operating duty cycle to be within the operating limits of the device to ensure closed-loop LED current regulation over the specified input and output voltage range.

Inductor Selection

The choice of inductor sets the continuous conduction mode (CCM) and discontinuous conduction mode (DCM) boundary condition. Therefore, one approach of selecting the inductor value is by deriving the relationship between the output power corresponding to CCM-DCM boundary condition, PO(BDRY) and inductance, L. This approach ensures CCM operation in battery-powered LED driver applications that are required to support different LED string configurations with a wide range of programmable LED current set points. The CCM-DCM boundary condition can be estimated either based on the lowest LED current and the lowest output voltage requirements for a given application or as a fraction of maximum output power, PO(MAX).

Equation 11. TPS92692 TPS92692-Q1 Eqn_PBDRY_SLVSD68.gif
Equation 12. TPS92692 TPS92692-Q1 EqPOBDRY2_SLVSDD9.gif

Boost:

Equation 13. TPS92692 TPS92692-Q1 EqLBST_SLVSDD9.gif

Buck-Boost:

Equation 14. TPS92692 TPS92692-Q1 EqLBB_SLVSDD9.gif

Select inductor with saturation current rating greater than the peak inductor current, IL(PK), at the maximum operating temperature.

Boost:

Equation 15. TPS92692 TPS92692-Q1 EqIPBST_SLVSDD9.gif

Buck-Boost:

Equation 16. TPS92692 TPS92692-Q1 EqIPBB_SLVSDD9.gif

Output Capacitor Selection

The output capacitors are required to attenuate the discontinuous or large ripple current generated by switching and achieve the desired peak-to-peak LED current ripple, ΔiLED(PP). The capacitor value depends on the total series resistance of the LED string, rD and the switching frequency, ƒSW.The capacitance required for the target LED ripple current can be calculated based on following equations.

Boost:

Equation 17. TPS92692 TPS92692-Q1 EqCOBST_SLVSDD9.gif

Buck-Boost:

Equation 18. TPS92692 TPS92692-Q1 EqCOBB_SLVSDD9.gif

When choosing the output capacitors, it is important to consider the ESR and the ESL characteristics as they directly impact the LED current ripple. Ceramic capacitors are the best choice due to their low ESR, high ripple current rating, long lifetime, and good temperature performance. When selecting ceramic capacitors, it is important to consider the derating factors associated with higher temperature and DC bias operating conditions. TI recommends an X7R dielectric with voltage rating greater than maximum LED stack voltage. An aluminum electrolytic capacitor can be used in parallel with ceramic capacitors to provide bulk energy storage. The aluminum capacitors must have necessary RMS current and temperature ratings to ensure prolonged operating lifetime. The minimum allowable RMS output capacitor current rating, ICOUT(RMS), can be approximated:

Boost and Buck-Boost:

Equation 19. TPS92692 TPS92692-Q1 EqCRMS_VSLVSDD9.gif

Input Capacitor Selection

The input capacitors, CIN, smooth the input voltage ripple and store energy to supply input current during input voltage or PWM dimming transients. The series inductor in the Boost and SEPIC topologies provides continuous input current and requires a smaller input capacitor to achieve desired input ripple voltage, ΔvIN(PP). The Buck-Boost and Flyback topologies have discontinuous input current and require a larger capacitor to achieve the same input voltage ripple. Based on the switching frequency, ƒSW, and the maximum duty cycle, DMAX, the input capacitor value can be calculated as follows:

Boost:

Equation 20. TPS92692 TPS92692-Q1 EqCINBST_SLVSDD9.gif

Buck-Boost:

Equation 21. TPS92692 TPS92692-Q1 EqCINBB_SLVSDD9.gif

X7R dielectric-based ceramic capacitors are the best choice due to their low ESR, high ripple current rating, and good temperature performance. For applications using PWM dimming, TI recommends an aluminum electrolytic capacitor in addition to ceramic capacitors to minimize the voltage deviation due to large input current transients generated in conjunction with the rising and falling edges of the LED current.

TPS92692 TPS92692-Q1 VINFTR_SLVSDD9.gif Figure 39. VIN Filter

Decouple VIN pin with a 0.1-µF ceramic capacitor, placed as close as possible to the device and a series 10-Ω resistor to create a 150-kHz low-pass filter.

Main Power MOSFET Selection

The power MOSFET is required to sustain the maximum switch node voltage, VSW, and switch RMS current derived based on the converter topology. TI recommends a drain voltage VDS rating of at least 10% greater than the maximum switch node voltage to ensure safe operation. The MOSFET drain-to-source breakdown voltage, VDS, is calculated using the following expressions.

Boost:

Equation 22. TPS92692 TPS92692-Q1 EqVDSBST_SLVSDD9.gif

Buck-Boost:

Equation 23. TPS92692 TPS92692-Q1 EqVDSBB_SLVSDD9.gif

The voltage, VO(OV), is the overvoltage protection threshold and the worst-case output voltage under fault conditions. The worst case MOSFET RMS current for Boost and Buck-Boost topology is dependent on maximum output power, PO(MAX), and is calculated as follows:

Equation 24. TPS92692 TPS92692-Q1 EqIQ_SLVSDD9.gif

Select a MOSFET with low total gate charge, Qg, to minimize gate drive and switching losses. The MOSFET RDS resistance is usually a less critical parameter because the switch conduction losses are not a significant part of the total converter losses at high operating frequencies. The switching and conduction losses are calculated as follows:

Equation 25. TPS92692 TPS92692-Q1 EqCLoss_SLVSDD9.gif
Equation 26. TPS92692 TPS92692-Q1 EqSLoss_SLVSDD9.gif

CRSS is the MOSFET reverse transfer capacitance. IL is the average inductor current. IGATE is gate drive output current, typically 500 mA. The MOSFET power rating and package is selected based on the total calculated loss, the ambient operating temperature, and maximum allowable temperature rise.

Rectifier Diode Selection

A Schottky diode (when used as a rectifier) provides the best efficiency due to its low forward voltage drop and near-zero reverse recovery time. TI recommends a diode with a reverse breakdown voltage, VD(BR), greater than or equal to MOSFET drain-to-source voltage, VDS, for reliable performance. It is important to understand the leakage current characteristics of the Schottky diode, especially at high operating temperatures because it impacts the overall converter operation and efficiency.

Use Equation 27 to calculate the current through the diode, ID.

Equation 27. TPS92692 TPS92692-Q1 EqIDiode_SLVSDD9.gif

The diode power rating and package is selected based on the calculated current, the ambient temperature and the maximum allowable temperature rise.

LED Current Programming

The LED current is set by the external current sense resistor, RCS, and the analog adjust voltage, VIADJ. The current sense resistor is placed in series with the LED load. The CSP and CSN inputs of the internal rail-to-rail current sense amplifier are connected to the RCS resistor to enable closed-loop regulation. When VIADJ > 2.5 V, the internal 2.4-V reference sets the V(CSP-CSN) threshold to 170.7 mV and the LED current is regulated to:

Equation 28. TPS92692 TPS92692-Q1 EqILED1_SLVSDD9.gif

The LED current can be programmed by varying VIADJ between 140 mV to 2.25 V. The LED current can be calculated using:

Equation 29. TPS92692 TPS92692-Q1 EqILED2_SLVSDD9.gif

TI recommends a low-pass common-mode filter consisting of 10-Ω resistors in series with CSP and CSN inputs and 0.01-µF capacitors to ground to minimize the impact of voltage ripple and noise on LED current accuracy (see Figure 24 section). A 0.1-µF capacitor across CSP and CSN is included to filter high-frequency differential noise.

Switch Current Sense Resistor

The switch current sense resistor, RIS, is used to implement peak current mode control and to set the peak switch current limit. The value of RIS is selected to protect the main switching MOSFET under fault conditions. The RIS can be calculated based on peak inductor current, iL(PK), and switch current limit threshold, VIS(LIMIT).

Equation 30. TPS92692 TPS92692-Q1 EqRSLmt_SLVSDD9.gif
TPS92692 TPS92692-Q1 ISFTR_SLVSDD9.gif Figure 40. IS Input Filter

The use of a 1-nF and 100-Ω low-pass filter is optional. If used, the recommended resistor value is less than 500 Ω in order to limit its influence on the internal slope compensation signal.

Slope Compensation

The magnitude of internal artificial ramp, VSL, is set by slope resistor RSLP. The device compensates for the changes in input voltage, VIN and output voltage sensed by CSP pin, VCSP to achieve stable inner current loop operation over wide range of operating conditions. The value of RSLP is determined by the inductor, L and the switch current sense resistor, RIS and is independent of input and output voltage for Boost, Boost-to-Battery and Buck-Boost topologies.

Equation 31. TPS92692 TPS92692-Q1 EqRSL_SLVSDD9.gif

Feedback Compensation

The open-loop response is the product of the modulator transfer function (shown in Equation 32) and the feedback transfer function. Using a first-order approximation, the modulator transfer function can be modeled as a single pole created by the output capacitor, and in the boost and buck-boost topologies, a right half-plane zero created by the inductor, where both have a dependence on the LED string dynamic resistance, rD. The ESR of the output capacitor is neglected in the analysis. The small-signal modulator model also includes a DC gain factor that is dependent on the duty cycle, output voltage, and LED current.

Equation 32. TPS92692 TPS92692-Q1 EqnGic_SLVSDD9.gif

The Table 2 summarizes the expression for the small-signal model parameters.

Table 2. Small-Signal Model Parameters

DC GAIN (G0) POLE FREQUENCY (ωP) ZERO FREQUENCY (ωZ)
Boost TPS92692 TPS92692-Q1 Eqn_GBst_SLVSD68.gif TPS92692 TPS92692-Q1 Eqn_wpbst_SLVSD68.gif TPS92692 TPS92692-Q1 Eqn_wnbst_SLVSD68.gif
Buck-Boost TPS92692 TPS92692-Q1 Eqn_GBB_SLVSD68.gif TPS92692 TPS92692-Q1 Eqn_wpbb_SLVSD68.gif TPS92692 TPS92692-Q1 Eqn_wnbb_SLVSD68.gif

The feedback transfer function includes the current sense resistor and the loop compensation of the transconductance amplifier. A compensation network at the output of the error amplifier is used to configure loop gain and phase characteristics. A simple capacitor, CCOMP, from COMP to GND (as shown in Figure 41) provides integral compensation and creates a pole at the origin. Alternatively, a network of RCOMP, CCOMP, and CHF, shown in Figure 42, can be used to implement proportional and integral (PI) compensation to create a pole at the origin, a low-frequency zero, and a high-frequency pole.

The feedback transfer function is defined as follows.

Feedback transfer function with integral compensation:

Equation 33. TPS92692 TPS92692-Q1 Eqn_Gc1_SLVSD68.gif

Feedback transfer function with proportional integral compensation:

Equation 34. TPS92692 TPS92692-Q1 Eqn_Gc2_SLVSD68.gif

The pole at the origin minimizes output steady-state error. High bandwidth is achieved with the PI compensator by placing the low-frequency zero an order of magnitude less than the crossover frequency. Use the following expressions to calculate the compensation network.

TPS92692 TPS92692-Q1 IntComp_SLVSDD9.gif Figure 41. Integral Compensator
TPS92692 TPS92692-Q1 PIComp_SLVSDD9.gif Figure 42. Proportional Integral Compensator

Boost and Buck-Boost with integral compensator:

Equation 35. TPS92692 TPS92692-Q1 Eqn_Ccmpbk_SLVSD68.gif

Boost and Buck-Boost with proportional integral compensator:

Equation 36. TPS92692 TPS92692-Q1 Eqn_Ccmpbb_SLVSD68.gif
Equation 37. TPS92692 TPS92692-Q1 Eqn_Chf_SLVSD68.gif
Equation 38. TPS92692 TPS92692-Q1 Eqn_Rcmpbb_SLVSD68.gif

The loop response is verified by applying step input voltage transients. The goal is to minimize LED current overshoot and undershoot with a damped response. Additional tuning of the compensation network may be necessary to optimize PWM dimming performance.

Soft-Start

The soft-start time (tSS) is the time required for the LED current to reach the target set point. The required soft-start time is programmed using a capacitor, CSS, from SS pin to GND, and is based on the LED current, output capacitor, and output voltage.

Equation 39. TPS92692 TPS92692-Q1 EqnCSS_SLVSDD9.gif

Overvoltage and Undervoltage Protection

The overvoltage threshold is programmed using a resistor divider, ROV2 and ROV1, from the output voltage, VO, to GND for Boost and SEPIC topologies, as shown in Figure 36 and Figure 38. If the LEDs are referenced to a potential other than GND, as in the Buck-Boost, the output voltage is sensed and translated to ground by using a PNP transistor and level-shift resistors, as shown in Figure 37. The overvoltage turn-off threshold, VO(OV), is:

Boost:

Equation 40. TPS92692 TPS92692-Q1 Eqn_VOV1_SLVSD68.gif

Buck and Buck-Boost:

Equation 41. TPS92692 TPS92692-Q1 Eqn_VOV2_SLVSD68.gif

The overvoltage hysteresis, VOV(HYS) is:

Equation 42. TPS92692 TPS92692-Q1 Eqn_VHYS_SLVSD68.gif

The corresponding undervoltage fault threshold, VO(UV) is:

Equation 43. TPS92692 TPS92692-Q1 EqnVUV_SLVSDD9.gif

Analog to PWM Dimming Considerations

The analog to PWM duty cycle translation is based on the internal PWM generator, configured by connecting a capacitor across RAMP pin and GND, as shown in Figure 29. The minimum PWM duty cycle is programmed by setting the voltage on DIM/PWM pin, VDIM using a resistor divider from VREF pin to GND.

Equation 44. TPS92692 TPS92692-Q1 EqVDIM_SLVSDD9.gif
Equation 45. TPS92692 TPS92692-Q1 EqRDIM_SLVSDD9.gif

The device is designed to support a minimum PWM duty cycle of 4% with better than 5% accuracy from DIM/PWM input to PDRV output in this operating mode. To avoid excess loading of the VREF LDO output, TI recommends a resistor network with sum of resistors RDIM1 and RDIM2 greater than 10 kΩ. A bypass capacitor of 0.1-µF prevents noise coupling and improves performs for low dimming values.

Direct PWM Dimming Considerations

The device can be configured to implement dimming function based on external PWM command by disabling the internal ramp generator, as explained in DIM/PWM Input section. The internal comparator reference is set to 2.49 V by connecting a 249-kΩ resistor, RRAMP, from the RAMP pin to GND. The internal PWM duty cycle is controlled by an external 5-V or 3.3-V signal, generated by a command module or a microcontroller.

Series P-Channel MOSFET Selection

When PWM dimming, the device requires another P-channel MOSFET placed in series with the LED load. Select a P-channel MOSFET with gate-to-source voltage rating of 10-V or higher and with a drain-to-source breakdown voltage rating greater than the output voltage. Ensure that the drain current rating of the P-channel MOSFET exceeds the programmed LED current by at least 10%.

It is important to consider the FET input capacitance and on-resistance as it impacts the accuracy and efficiency of the LED driver. TI recommends a FET with lower input capacitance and gate charge to minimize the errors caused by rise and fall times when PWM dimming at low duty cycles.

Typical Applications

Typical Boost LED Driver

TPS92692 TPS92692-Q1 BSTEVM_SLVSDD9.gif Figure 43. Boost LED Driver With High-Side Current Sense

Design Requirements

Table 3 shows the design parameters for the boost LED driver application.

Table 3. Design Parameters

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT CHARACTERISTICS
Input voltage range 7 14 18 V
Input UVLO setting 4.5 V
OUTPUT CHARACTERISTICS
LED forward voltage 2.8 3.2 3.6 V
Number of LEDs in series 14
VO Output voltage LED+ to LED– 39.2 44.8 50.4 V
ILED Output current 350 500 mA
RR LED current ripple ratio 4%
rD LED string resistance 3 Ω
PO(MAX) Maximum output power 25 W
fPWM PWM dimming frequency 240 Hz
DPWM Analog to PWM duty cycle set point (low brightness mode) 8 %
SYSTEMS CHARACTERISTICS
PO(BDRY) Output power at CCM-DCM boundary condition 6 W
ΔvIN(PP) Input voltage ripple 20 mV
VO(OV) Output overvoltage protection threshold 62 V
VOV(HYS) Output overvoltage protection hysteresis 3 V
tss Soft-start period 8 ms
fDM Dither Modulation Frequency 600 Hz
fSW Switching frequency 390 kHz

Detailed Design Procedure

This procedure is for the boost LED driver application.

Calculating Duty Cycle

Solve for D, DMAX, and DMIN:

Equation 46. TPS92692 TPS92692-Q1 EBST_D_SLVDD9.gif
Equation 47. TPS92692 TPS92692-Q1 EBST_DMAX_SLVSDD9.gif
Equation 48. TPS92692 TPS92692-Q1 EBST_DMIN_SLVSDD9.gif

Setting Switching Frequency

Solve for RT:

Equation 49. TPS92692 TPS92692-Q1 EBST_RT_SLVSDD9.gif

The closest standard resistor of 20 kΩ is selected.

Setting Dither Modulation Frequency

Solve for CDM:

Equation 50. TPS92692 TPS92692-Q1 EBST_CDM_SLVSDD9.gif

The closest standard capacitor is 27 nF.

Inductor Selection

The inductor is selected to meet the CCM-DCM boundary power requirement, PO(BDRY). In most applications, PO(BDRY) is set to be 1/3 of the maximum output power, PO(MAX). The inductor value is calculated for typical input voltage, VIN(TYP), and output voltage, VO(TYP):

Equation 51. TPS92692 TPS92692-Q1 EBST_L_SLVSDD9.gif

The closest standard inductor is 22 µH.

For best results, ensure that the inductor saturation current rating is greater than the peak inductor current, IL(PK).

Equation 52. TPS92692 TPS92692-Q1 EBST_ILPK_SLVSDD9.gif

Output Capacitor Selection

The specified peak-to-peak LED current ripple, ΔiLED(PP), is:

Equation 53. TPS92692 TPS92692-Q1 EBST_ILEDPP_SLVSDD9.gif

The output capacitance required to achieve the target LED current ripple is:

Equation 54. TPS92692 TPS92692-Q1 EBST_COUT_SLVSDD9.gif

Four 4.7-µF, 100-V rated X7R ceramic capacitors are used in parallel to achieve a combined output capacitance of 18.8 µF.

Input Capacitor Selection

The input capacitor is required to reduce switching noise conducted through the input wires and reduced the input impedance of the LED driver. The capacitor required to limit peak-to-peak input ripple voltage ripple, ΔvIN(PP), to 20 mV is given by:

Equation 55. TPS92692 TPS92692-Q1 EBST_CIN_SLVSDD9.gif

Two 4.7-µF, 50-V X7R ceramic capacitors are used in parallel to achieve a combined input capacitance of 9.4-µF.

Main N-Channel MOSFET Selection

Ensure that the MOSFET ratings exceed the maximum output voltage and RMS switch current.

Equation 56. TPS92692 TPS92692-Q1 EBST_VDS_SLVSDD9.gif
Equation 57. TPS92692 TPS92692-Q1 EBST_IQ_SLVSDD9.gif

A N-channel MOSFET with a voltage rating of 100-V and a current rating of 4 A is required for this design.

Rectifying Diode Selection

Select a diode should be selected based on the following voltage and current ratings:

Equation 58. TPS92692 TPS92692-Q1 EBST_VBR_SLVSDD9.gif
Equation 59. TPS92692 TPS92692-Q1 EBST_ID_SLVSDD9.gif

A 100-V Schottky diode with low reverse leakage current is suitable for this design. The package must be able to handle the power dissipation resulting from continuous forward current, ID, of 0.5 A.

Programming LED Current

The LED current can be programmed to match the LED string configuration by using a resistor divider, RADJ1 and RADJ2, from VREF to GND for a given sense resistor, RCS, as shown in Figure 43. To maximize the accuracy, the IADJ pin voltage is set to 2.1 V for the specified maximum LED current of 500-mA. The current sense resistor, RCS, is then calculated as:

Equation 60. TPS92692 TPS92692-Q1 EBST_ILED_SLVSDD9.gif

A standard resistor of 0.3 Ω is selected. Table 4 summarizes the IADJ pin voltage and the choice of the RADJ1 and RADJ2 resistors for different current settings.

Table 4. Design Requirements

LED CURRENT IADJ VOLTAGE (VIADJ) RADJ1 RADJ2
100 mA 420 mV 6.34 kΩ 68.1 kΩ
350 mA 1.47 V 29.4 kΩ 68.1 kΩ
500 mA 2.1 V 49.9 kΩ 68.1 kΩ

Setting Switch Current Limit

Solve for current sense resistor, RIS:

Equation 61. TPS92692 TPS92692-Q1 EBST_RIS_SLVSDD9.gif

A standard value of 0.06 Ω is selected.

Programming Slope Compensation

The artificial slope is programmed by resistor, RSL.

Equation 62. TPS92692 TPS92692-Q1 EBST_RSL_SLVSDD9.gif

A standard resistor of 100 kΩ is selected.

Deriving Compensator Parameters

The modulator transfer function for the Boost converter is derived for nominal VIN voltage and corresponding duty cycle, D, and is given by the following equation. (See Feedback Compensation section for more information.)

Equation 63. TPS92692 TPS92692-Q1 EBST_Gic_SLVSDD9.gif

The proportional-integral compensator components CCOMP and RCOMP are obtained by solving the following expressions:

Equation 64. TPS92692 TPS92692-Q1 EBST_Ccmp_SLVSDD9.gif
Equation 65. TPS92692 TPS92692-Q1 EBST_Rcmp_SLVSDD9.gif

The closet standard capacitor of 18-nF and resistor of 4.12-kΩ is selected. The high frequency pole location is set by a 1-nF CHF capacitor.

Setting Start-up Duration

The soft-start capacitor required to achieve start-up in 8 ms is given by:

Equation 66. TPS92692 TPS92692-Q1 EBB_CSS_SLVSDD9.gif

The closet standard capacitor of 100 nF is selected.

Setting Overvoltage Protection Threshold

The overvoltage protection threshold of 62 V and hysteresis of 3 V is set by the ROV1 and ROV2 resistor divider.

Equation 67. TPS92692 TPS92692-Q1 EBST_ROV2_SLVSD6D9.gif
Equation 68. TPS92692 TPS92692-Q1 EBST_ROV1_SLVSDD9.gif

The standard resistor values of 150 kΩ and 3.01 kΩ are chosen.

Analog-to-PWM Dimming Considerations

The PWM dimming frequency is set by the CRAMP capacitor.

Equation 69. TPS92692 TPS92692-Q1 EBST_CDIM_SLVSDD9.gif

The closet standard capacitor of 10 nF is selected.

The PWM duty cycle of 8% programmed by setting the DIM/PWM voltage using resistor divider, RDIM1 and RDIM2 connected from VREF pin to GND.

Equation 70. TPS92692 TPS92692-Q1 EBST_VDIM_SLVSDD9.gif

The value of resistor, RDIM1 is set as of 10-kΩ. The resistor RDIM2 is calculated using the following equation:

Equation 71. TPS92692 TPS92692-Q1 EBST_RDIM2_SLVSDD9.gif

A standard resistor of 33 kΩ is selected.

A P-channel MOSFET with a voltage rating of 100-V and a current rating of 1 A is required to enable series FET dimming for this design.

Application Curves

These curves are for the boost LED driver.

TPS92692 TPS92692-Q1 EBST_WF1_SLVSDD9.gif
     Ch1: Switch node voltage;
     Ch2: Switch current sense voltage;
     Ch4: LED current; Time: 1 µs/div
Figure 44. Normal Operation
TPS92692 TPS92692-Q1 EBST_WF3_SLVSDD9.gif
     Ch1: Input voltage; Ch2: Soft-start (SS) voltage;
     Ch3: Input current;
     Ch4: LED current; Time: 4 ms/div
Figure 46. Startup Transient
TPS92692 TPS92692-Q1 EBST_WF5_SLVSDD9.gif
     Ch1: External PWM input signal;
     Ch2: PDRV voltage;
     Ch4: LED current; Time: 2 ms/div
Figure 48. Direct PWM Dimming Transient
TPS92692 TPS92692-Q1 EBST_WF7_SLVSDD9.gif
     Ch1: FLT output;
     Ch2: CSP pin voltage;
     Ch4: LED current; Time: 100 ms/div
Figure 50. LED Open-Circuit Fault
TPS92692 TPS92692-Q1 EBST_EMI1_SLVSDD9.gif Figure 52. Conducted EMI Scan (SSFM Disabled)
TPS92692 TPS92692-Q1 EBST_WF2_SLVSDD9.gif
     Ch1: Dither modulation voltage;
     Ch4: LED current; Time: 400 µs/div
Figure 45. Spread Spectrum Frequency Modulation
TPS92692 TPS92692-Q1 EBST_WF4_SLVSDD9.gif
     Ch1: Dim/PWM voltage;
     Ch2: RAMP pin voltage;
     Ch4: LED current; Time: 2 ms/div
Figure 47. Analog-to-PWM Dimming Transient
TPS92692 TPS92692-Q1 EBST_WF6_SLVSDD9.gif
     Ch1: External PWM input voltage;
     Ch3: Switch sense current resistor voltage;
     Ch4: LED current; Time: 4 µs/div
Figure 49. PWM Dimming Transient (Zoomed)
TPS92692 TPS92692-Q1 EBST_WF8_SLVSDD9.gif
     Ch1: FLT output;
     Ch2: CSP pin voltage;
     Ch4: LED current; Time: 100 ms/div
Figure 51. LED Short-Circuit Fault
TPS92692 TPS92692-Q1 EBST_EMI2_SLVSDD9.gif Figure 53. Conducted EMI Scan (SSFM Enabled)

Typical Buck-Boost LED Driver

TPS92692 TPS92692-Q1 BBEVM_SLVSDD9.gif Figure 54. Buck-Boost LED Driver

Design Requirements

Buck-Boost LED drivers provide the flexibility needed in applications that support multiple LED load configurations. For such applications, it is necessary to modify the design procedure presented in to account for the wider range of output voltage and LED current specifications. This design is based on the maximum output power PO(MAX), set by the lumen output specified for the lighting application. The design procedure for a battery connected application with 3 to 9 LEDs in series and maximum 15 W output power is outlined in this section.

Table 5. Design Parameters

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT CHARACTERISTICS
Input voltage range 7 14 18 V
Input UVLO setting 4.5 V
OUTPUT CHARACTERISTICS
LED forward voltage 2.8 3.2 3.6 V
Number of LEDs in series 3 7 11
VO Output voltage LED+ to LED– 8.4 22.4 39.6 V
ILED Output current 100 500 1500 mA
ΔiLED(PP) LED current ripple 5%
rD LED string resistance 0.9 2.1 3.3 Ω
PO(MAX) Maximum output power 12.6 W
DPWM Direct PWM dimming range fPWM = 240 Hz 4% 100%
SYSTEMS CHARACTERISTICS
PO(BDRY) Output power at CCM-DCM boundary condition 3 W
ΔvIN(PP) Input voltage ripple 70 mV
VO(OV) Output overvoltage protection threshold 45 V
VOV(HYS) Output overvoltage protection hysteresis 3 V
tSS Soft-start period 8 ms
fSW Switching frequency 390 kHz

Detailed Design Procedure

Calculating Duty Cycle

Solving for D, DMAX, and DMIN:

Equation 72. TPS92692 TPS92692-Q1 EBB_D_SLVSDD9.gif
Equation 73. TPS92692 TPS92692-Q1 EBB_DMAX_SLVSDD9.gif
Equation 74. TPS92692 TPS92692-Q1 EBB_DMIN_SLVSDD9.gif

Setting Switching Frequency

Solving for RT resistor:

Equation 75. TPS92692 TPS92692-Q1 EBB_RT_SLVSD68.gif

Setting Dither Modulation Frequency

Solve for CDM:

Equation 76. TPS92692 TPS92692-Q1 EBST_CDM_SLVSDD9.gif

The closest standard capacitor is 27 nF.

Inductor Selection

The inductor is selected to meet the CCM-DCM boundary power requirement, PO(BDRY). Typically, the boundary condition is set to enable CCM operation at the lowest possible operating power based on minimum LED forward voltage drop and LED current. In most applications, PO(BDRY) is set to be 1/3 of the maximum output power, PO(MAX). The inductor value is calculated for maximum input voltage, VIN(MAX), and output voltage, VO(MAX):

Equation 77. TPS92692 TPS92692-Q1 EBB_L_SLVSDD9.gif

The closest standard value of 33 µH is selected. The inductor ripple current is given by:

Equation 78. TPS92692 TPS92692-Q1 EBB_ILPP_SLVSDD9.gif

Ensure that the inductor saturation rating exceeds the calculated peak current which is based on the maximum output power using Equation 79.

Equation 79. TPS92692 TPS92692-Q1 EBB_ILPK_SLVSDD9.gif

Output Capacitor Selection

Select the output capacitance to achieve the 5% peak-to-peak LED current ripple specification. Based on the maximum power, the capacitor is calculated in Equation 80.

Equation 80. TPS92692 TPS92692-Q1 EBB_COUT_SLVSDD9.gif

This design requires a minimum of three, 10-µF, 50-V and one 4.7-µF, 100-V, X7R ceramic capacitors in parallel to meet the LED current ripple specification over the entire range of output power. Additional capacitance may be required based on the derating factor under DC bias operation.

Input Capacitor Selection

The input capacitor is calculated based on the peak-to-peak input ripple specifications, ΔvIN(PP). The capacitor required to limit the ripple to 70 mV over range of operation is calculated using:

Equation 81. TPS92692 TPS92692-Q1 EBB_CIN_SLVSDD9.gif

A parallel combination of four 10-µF, 50-V X7R ceramic capacitors are used for a combined capacitance of 40 µF. Additional capacitance may be required based on the derating factor under DC bias operation.

Main N-Channel MOSFET Selection

Calculating the minimum transistor voltage and current rating:

Equation 82. TPS92692 TPS92692-Q1 EBB_VDS_SLVSDD9.gif
Equation 83. TPS92692 TPS92692-Q1 EBB_IQ_SLVSDD9.gif

This application requires a 100-V N-channel MOSFET with a current rating exceeding 3 A.

Rectifier Diode Selection

Calculating the minimum Schottky diode voltage and current rating:

Equation 84. TPS92692 TPS92692-Q1 EBB_VBR_SLVSDD9.gif
Equation 85. TPS92692 TPS92692-Q1 EBB_ID_SLVSD68.gif

This application requires a 100-V Schottky diode with a current rating exceeding 1.5 A. TI recommends a single high-current diode instead of paralleling multiple lower-current-rated diodes to ensure reliable operation over temperature.

Programming LED Current

The LED current can be programmed to match the LED string configuration by using a resistor divider, RADJ1 and RADJ2, from VREF to GND for a given sense resistor, RCS, as shown in Figure 54. To maximize the accuracy, the IADJ pin voltage is set to 2.1 V for the specified LED current of 1.5 A. The current sense resistor, RCS, is then calculated as:

Equation 86. TPS92692 TPS92692-Q1 EBB_RCS_SLVSD68.gif

A standard resistor of 0.1 Ω is selected. Table 5 summarizes the IADJ pin voltage and the choice of the RADJ1 and RADJ2 resistors for different current settings.

Table 6. Design Requirements

LED CURRENT IADJ VOLTAGE (VIADJ) RADJ1 RADJ2
100 mA 140 mV 2.0 kΩ 68.1 kΩ
500 mA 700 mV 11.2 kΩ 68.1 kΩ
1.5 A 2.1 V 50 kΩ 68.1 kΩ

Setting Switch Current Limit and Slope Compensation

Solving for RIS:

Equation 87. TPS92692 TPS92692-Q1 EBB_RIS_SLVSDD9.gif

A standard resistor of 0.06 Ω is selected.

Programming Slope Compensation

The artificial slope is programmed by resistor, RSL.

Equation 88. TPS92692 TPS92692-Q1 EBB_RSL_SLVSDD9.gif

A standard resistor of 150 kΩ is selected.

Deriving Compensator Parameters

A simple integral compensator provides a good starting point to achieve stable operation across the wide operating range. The modulator transfer function with the lowest frequency pole location is calculated based on maximum output voltage, VO(MAX), duty cycle, DMAX, LED dynamic resistance, rD(MAX), and minimum LED string current, ILED(MIN). (See Table 2 for more information.)

Equation 89. TPS92692 TPS92692-Q1 EBB_Gic_SLVSDD9.gif

The compensation capacitor needed to achieve stable response is:

Equation 90. TPS92692 TPS92692-Q1 EBB_Ccmp_SLVSDD9.gif

A 100 nF capacitor is selected.

A proportional integral compensator can be used to achieve higher bandwidth and improved transient performance. However, it is necessary to experimentally tune the compensator parameters over the entire operating range to ensure stable operation.

Setting Startup Duration

Solving for soft-start capacitor, CSS, based on 8-ms startup duration:

Equation 91. TPS92692 TPS92692-Q1 EBB_CSS_SLVSDD9.gif

A 100-nF soft-start capacitor is selected.

Setting Overvoltage Protection Threshold

Solving for resistors, ROV1 and ROV2:

Equation 92. TPS92692 TPS92692-Q1 EBB_ROV1_SLVSDD9.gif
Equation 93. TPS92692 TPS92692-Q1 EBB_ROV2_SLVSDD9.gif

The closest standard values of 150 kΩ and 4.12 kΩ along with a 60-V PNP transistor are used to set the OVP threshold to 45 V with 3 V of hysteresis.

Direct PWM Dimming Consideration

A 60-V, 2-A P-channel FET is used to achieve series FET PWM dimming.

Application Curves

These curves are for the buck-boost LED driver.

TPS92692 TPS92692-Q1 D021_SLVSDD9.gif
VIN = 14 V
Figure 55. LED Current vs IADJ Voltage
TPS92692 TPS92692-Q1 EBB_WF2_SLVSDD9.gif
     Ch1: FLT output;
     Ch2: CSP pin voltage;
     Ch4: LED current; Time: 100 ms/div
Figure 57. LED Open-Circuit Fault
TPS92692 TPS92692-Q1 D022_SLVSDD9.gif
VIN = 14 V
Figure 56. Efficiency
TPS92692 TPS92692-Q1 EBB_WF1_SLVSDD9.gif
     Ch1: FLT output;
     Ch2: CSP pin voltage;
     Ch4: LED current; Time: 100 ms/div
Figure 58. LED Short-Circuit Fault