SLUSDV8B November   2020  – March 2021 TPSM5D1806

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics (VIN = 12 V)
    7. 6.7 Typical Characteristics (VIN = 5 V)
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjustable Output Voltage
      2. 7.3.2  Frequency Selection
        1. 7.3.2.1 Synchronization
        2. 7.3.2.2 Allowable Switching Frequency
      3. 7.3.3  Minimum and Maximum Input Voltage
      4. 7.3.4  Recommended Settings
      5. 7.3.5  Device Mode Configuration
        1. 7.3.5.1 MODE1 (Operating Mode and Phase Position)
        2. 7.3.5.2 MODE2 (Setting the Switching Frequency)
      6. 7.3.6  Input Capacitors
      7. 7.3.7  Minimum Required Output Capacitance
      8. 7.3.8  Ambient Temperature Versus Total Power Dissipation
      9. 7.3.9  Remote Sense
      10. 7.3.10 Enable (EN) and Under Voltage Lockout (UVLO)
      11. 7.3.11 Soft Start
      12. 7.3.12 Power Good
      13. 7.3.13 Safe Start-up into Pre-Biased Outputs
      14. 7.3.14 BP5
      15. 7.3.15 Overcurrent Protection
      16. 7.3.16 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Shutdown Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application (Dual Outputs)
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Setpoint
        3. 8.2.2.3 Input Capacitors
        4. 8.2.2.4 Output Capacitor Selection
      3. 8.2.3 Typical Application (Paralleled Outputs)
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
          1. 8.2.3.2.1 Output Voltage Setpoint
          2. 8.2.3.2.2 Input Capacitors
          3. 8.2.3.2.3 Output Capacitor Selection
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
      1. 10.2.1 Package Specifications
      2. 10.2.2 EMI
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.11 Soft Start

The TPSM5D1806 soft start feature limits the inrush current from the input supply when the device is powered up. For dual output configuration, the soft start time is internally programmed to 1 ms. The soft start pin must be left floating in dual output configuration.

The external soft start is enabled when the device is configured in parallel output operation. In parallel output applications, if the SS pin is left open, the default soft start time is also 1 ms. Applications that deliver high load current can have a large amount of capacitance at the output and can require longer soft start time. The soft start time for such applications can be extended by connecting an external capacitor, CSS from the soft-start pin to AGND. With external CSS, the soft-start time is the longer of 1 ms or the programmed external soft start time. An internal current source (ISS = 2 μA) charges CSS and generates a ramp from 0 V to VFB (0.5 V) to control the ramp-up rate of the output voltage. The external soft-start time can be selected from Table 7-6 or calculated using Equation 3.

Equation 3. GUID-20210121-CA0I-SDQR-195P-9WFCWSJVQHJ3-low.gif
Table 7-6 Css Values and Soft-Start Times
CSS (nF) Open 6.2 8.2 10 12 20
tSS (ms) 1 1.5 2 2.5 3 5

The soft-start capacitor is discharged when VOUT is shut down by either fault protection or when VEN is below the enable threshold.