SLOS489D December   2005  – May 2018 TS321

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: TS321
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Voltage
      2. 7.3.2 Gain Bandwidth Product
      3. 7.3.3 Slew Rate
      4. 7.3.4 Input Common-Mode Range
      5. 7.3.5 Stability With High Capacitive Loads
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

VCC+ = 5 V, VCC– = GND, VO = 1.4 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIO Input offset voltage RS = 0, 5 V < VCC+ < 30 V
0 < VIC < (VCC+ – 1.5 V)		 TA = 25°C 0.5 4 mV
TA = Full range 5
IIO Input offset current TA = 25°C 2 30 nA
TA = Full range 50
IIB Input bias current(1) TA = 25°C 20 150 nA
TA = Full range 200
AVD Large-signal differential voltage amplification VCC = 15 V, RL = 2 kΩ
VO = 1.4 V to 11.4 V		 TA = 25°C 50 100 V/mV
TA = Full range 25
VICR Common-mode input voltage(2) VCC = 30 V TA = 25°C 0 VCC+ – 1.5 V
TA = Full range 0 VCC+ – 2
VOH High-level output voltage VCC = 30 V
RL = 2 kΩ		 TA = 25°C 26 27 V
TA = Full range 25.5
VCC = 30 V
RL = 10 kΩ		 TA = 25°C 27 28
TA = Full range 26.5
VCC = 5 V
RL = 2 kΩ		 TA = 25°C 3.5
TA = Full range 3
VOL Low-level output voltage RL = 10 kΩ TA = 25°C 5 15 mV
TA = Full range 20
GBP Gain bandwidth product VCC = 30 V, VI = 10 mV, RL = 2 kΩ
f = 100 kHz, CL = 100 pF
TA = 25°C		 0.8 MHz
SR Slew rate VCC = 15 V, VI = 0.5 V to 3 V, RL = 2 kΩ, CL = 100 pF, unity gain,
TA = 25°C		 0.4 V/µs
φm Phase margin TA = 25°C 60 °
CMRR Common-mode rejection ratio RS ≤ 10 kΩ
TA = 25°C		 65 85 dB
ISOURCE Output source current VCC = 15 V, VO = 2 V, VID = 1 V
TA = 25°C		 20 40 mA
ISINK Output sink current VCC = 15 V, VID = 1 V
VO = 2 V
TA = 25°C		 10 20 mA
VCC = 15 V, VID = 1 V
VO = 0.2 V
TA = 25°C		 12 50 µA
IO Short-circuit to GND VCC = 15 V, TA = 25°C 40 60 mA
SVR Supply-voltage rejection ratio VCC = 5 V to 30 V, TA = 25°C 65 110 dB
ICC Total supply current VCC = 5 V
TA = 25°C, no load		 500 800 µA
VCC = 30 V
TA = 25°C, no load		 600 900
VCC = 5 V
TA = full range, no load		 600 900
VCC = 30 V
TA = full range, no load		 1000
THD Total harmonic distortion VCC = 30 V, VO = 2 Vpp, AV = 20 dB
RL = 2 k, f = 1 kHz, CL = 100 pF, TA = 25°C		 0.015%
eN Equivalent input noise voltage VCC = 30 V, f = 1 kHz, RS = 100 Ω
TA = 25°C		 50
(1) The direction of the input current is out of the device. This current essentially is constant, independent of the state of the output, so no loading change exists on the input lines.
(2) The input common-mode voltage of either input signal should not be allowed to go negative by more than 0.3 V. The upper end of the common-mode voltage range is VCC+ – 1.5 V, but either or both inputs can go to 32 V without damage.