SCDS335A September   2012  – August 2014 TSU8111

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Linear Charger
      2. 7.3.2 Voltage Protection
        1. 7.3.2.1 Overvoltage Protection
        2. 7.3.2.2 Undervoltage Protection
      3. 7.3.3 Power-on Reset
      4. 7.3.4 Software Reset
      5. 7.3.5 Power Supervisor
    4. 7.4 Device Functional Modes
      1. 7.4.1 Standby Mode
      2. 7.4.2 Automatic Switching Mode
      3. 7.4.3 Manual Switching Mode
    5. 7.5 Programming
      1. 7.5.1 Writes
      2. 7.5.2 Reads
    6. 7.6 Register Map
      1. 7.6.1  Device ID (01h) Register Field Descriptions
      2. 7.6.2  Control (02h) Register Field Descriptions
      3. 7.6.3  Interrupt 1 (03h) Register Field Descriptions
      4. 7.6.4  Interrupt 2 (04h) Register Field Descriptions
      5. 7.6.5  Interrupt Mask 1 (05h) Register Field Descriptions
      6. 7.6.6  Interrupt Mask 2 (06h) Register Field Descriptions
      7. 7.6.7  ADC (07h) Register Field Descriptions
      8. 7.6.8  Timing Set 1 (08h) Register Field Descriptions
      9. 7.6.9  Timing Set 2 (09h) Register Field Descriptions
      10. 7.6.10 Device Type 1 (0Ah) Register Field Descriptions
      11. 7.6.11 Device Type 2 (0Bh) Register Field Descriptions
      12. 7.6.12 Button 1 (0Ch) Register Field Descriptions
      13. 7.6.13 Button 2 (0Dh) Register Field Descriptions
      14. 7.6.14 Manual SW 1 (13h) Register Field Descriptions
      15. 7.6.15 Manual SW 2 (14h) Register Field Descriptions
      16. 7.6.16 Reset (1Bh) Register Field Descriptions
      17. 7.6.17 Charger control 1 (20h) Register Field Descriptions
      18. 7.6.18 Charger control 2 (21h) Register Field Descriptions
      19. 7.6.19 Battery Charger Control 3 (22h) Register Field Descriptions
      20. 7.6.20 Charger Interrupt (24h) Register Field Descriptions
      21. 7.6.21 Charger Interrupt Mask (25h) Register Field Descriptions
      22. 7.6.22 Charger Status (26h) Register Field Descriptions
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Trademarks
    2. 11.2 Electrostatic Discharge Caution
    3. 11.3 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

  • The TSU8111 should be placed as close to the USB connector as possible to reduce the effect of stray noise.
  • Decoupling capacitors, as mentioned in Power Supply Recommendations, should be as close to the device as possible. This will also reduce the effect of ESR and ripple seen on voltages due to transient spikes.
  • Lengths of all traces should be kept less than 2 inches.
  • For 1-oz copper thickness, the width of the USB traces should be at least 15 mils.
  • Traces to the VBAT, VBUS, and VLDO pins should be capable of carrying 1 A. This will keep routing resistance less than 100-mΩ and minimize voltage drops when charging with high currents.
  • Maximize the use of vias on VBUS, VBAT, and GND. Increasing the number of vias will reduce routing resistance and improve thermal performance.
  • Minimize the use of vias for USB traces to preserve USB signal integrity.
  • All USB traces (DP_CON, DM_CON, DP_HT, DM_HT, TxD, and RxD) should have 45-Ω single-ended impedance and 90-Ω differential impedance to fulfill USB 2.0 requirements.

10.2 Layout Example

layout_scds335.gif