SLLSEV7E August   2016  – March 2023 TUSB546-DCI

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Supply Characteristics
    6. 6.6  DC Electrical Characteristics
    7. 6.7  AC Electrical Characteristics
    8. 6.8  Timing Requirements
    9. 6.9  Switching Characteristics
    10. 6.10 Typical Characteristics
      1.      Parameter Measurement Information
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 USB 3.1
      2. 7.3.2 DisplayPort
      3. 7.3.3 4-Level Inputs
      4. 7.3.4 Receiver Linear Equalization
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Configuration in GPIO Mode
      2. 7.4.2 28
      3. 7.4.3 Device Configuration In I2C Mode
      4. 7.4.4 DisplayPort Mode
      5. 7.4.5 Linear EQ Configuration
      6. 7.4.6 USB3.1 Modes
      7. 7.4.7 Operation Timing – Power Up
    5. 7.5 Programming
    6. 7.6 Register Maps
      1. 7.6.1 General Register (address = 0x0A) [reset = 00000001]
      2. 7.6.2 DisplayPort Control/Status Registers (address = 0x10) [reset = 00000000]
      3. 7.6.3 DisplayPort Control/Status Registers (address = 0x11) [reset = 00000000]
      4. 7.6.4 DisplayPort Control/Status Registers (address = 0x12) [reset = 00000000]
      5. 7.6.5 DisplayPort Control/Status Registers (address = 0x13) [reset = 00000000]
      6. 7.6.6 USB3.1 Control/Status Registers (address = 0x20) [reset = 00000000]
      7. 7.6.7 USB3.1 Control/Status Registers (address = 0x21) [reset = 00000000]
      8. 7.6.8 USB3.1 Control/Status Registers (address = 0x22) [reset = 00000100]
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 System Examples
      1. 8.3.1 USB 3.1 Only
      2. 8.3.2 USB 3.1 and 2 Lanes of DisplayPort
      3. 8.3.3 DisplayPort Only
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  9. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Linear EQ Configuration

Each of the TUSB546-DCI receiver lanes has individual controls for receiver equalization. The receiver equalization gain value can be controlled either through I2C registers or through GPIOs. Table 7-7 lists the gain value for each available combination when TUSB546-DCI is in GPIO mode. These same options are also available in I2C mode by updating registers DP0EQ_SEL, DP1EQ_SEL, DP2EQ_SEL, DP3EQ_SEL, EQ1_SEL, EQ2_SEL, and SSEQ_SEL.

Table 7-7 TUSB546-DCI Receiver Equalization GPIO Control
Equalization Setting #USB3.1 DOWNSTREAM FACING PORTSUSB 3.1 UPSTREAM FACING PORTALL DISPLAYPORT LANES
EQ1 PIN LEVELEQ0 PIN LEVELEQ GAIN at 2.5 GHz (dB)SSEQ1 PIN LEVELSSEQ0 PIN LEVELEQ GAIN at 2.5 GHz (dB)DPEQ1 PIN LEVELDPEQ0 PIN LEVELEQ GAIN at 4.05 GHz (dB)
0000.200-1.6001.0
10R1.20R-0.50R3.3
20F2.20F0.50F4.9
3013.3011.6016.5
4R04.2R02.4R07.5
5RR5.1RR3.4RR8.6
6RF5.9RF4.1RF9.5
7R16.7R14.9R110.4
8F07.4F05.7F011.1
9FR8.1FR6.4FR11.7
10FF8.7FF6.9FF12.3
11F19.3F17.5F112.8
12109.7108.01013.2
131R10.21R8.51R13.6
141F10.61F8.91F14.0
151111.1119.41114.4