SLUSCM5A August 2017 – February 2018 UCC24612
With more stringent efficiency standards such as Department of Energy (DoE) level VI, external power supplies are expected to maintain very low standby power at no-load conditions. It is essential for the SR controller to enter the low-power standby mode to help save standby power.
During standby mode, the power converter loss allocation is quite different compared to heavy load. At heavier load, both conduction loss and switching loss are quite high. However, at light load, the conduction loss becomes insignificant and switching loss dominates. To help improve standby power, modern power supply controllers often enter burst mode to save switching loss. Furthermore, in each burst switching cycle, the energy delivered is maximized to minimize the number of switching cycles needed and further reduce the switching loss.
Traditionally, the SR controller monitors the SR conduction time to distinguish normal operating modes from standby mode. This criterion is no longer suitable for the modern power supply controller designed for delivering minimum standby power.
Instead, in UCC24612, a frequency based standby mode detection is used. UCC24612 continuously monitors the average switching frequency of the SR. Once the average switching frequency of the SR controller drops below 12 kHz, the UCC24612 enters standby mode and reduces its current consumption to IVDDSTBY. During standby mode, the VG pin is kept low while the SR switching cycle is continuously monitored. Once the average switching frequency is more than 15 kHz over a 4.5-ms window, the SR operation is enabled again. UCC24612 ignores the first six SR switching cycles after coming out of standby mode to make sure the SR isn't turned on in the middle of the switching cycle.