SLUSF39A December   2022  – February 2024 UCC5880-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Power Supply Recommendations
    1. 5.1 VCC1
    2. 5.2 VCC2
    3. 5.3 VEE2
  7. 6Layout
    1. 6.1 Layout Guidelines
      1. 6.1.1 Component Placement
      2. 6.1.2 Grounding Considerations
      3. 6.1.3 High-Voltage Considerations
      4. 6.1.4 Thermal Considerations
    2. 6.2 Layout Example
  8. 7Device and Documentation Support
    1. 7.1 Device Support
      1. 7.1.1 Third-Party Products Disclaimer
    2. 7.2 Receiving Notification of Documentation Updates
    3. 7.3 Support Resources
    4. 7.4 Trademarks
    5. 7.5 Electrostatic Discharge Caution
    6. 7.6 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DFC|32
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.1.4 Thermal Considerations

  • The power dissipated in UCC5880-Q1 is directly proportional to the VCC1, VCC2, and VEE2 voltages, capacitive loading, and switching frequency. Proper PCB layout helps dissipate heat from the device to the PCB and minimize junction to board thermal impedance (θJB).
  • Increasing the PCB copper connecting to VCC2 and VEE2 planes is recommended, with priority on maximizing the connection to VEE2.
  • If there are multiple layers in the system, it is also recommended to connect the VCC2 and VEE2 to their respective internal planes using multiple vias of adequate size. However, it is still critical to ensure that there are not any traces/planes from different high voltage planes overlapping.