SLUSA78C July 2010 – July 2015
PRODUCTION DATA.
PIN | DESCRIPTION | |
---|---|---|
NAME | NO. | |
ACDET | 6 | Adapter detection input. Program the adapter valid input threshold by connecting a resistor-divider from the adapter input to the ACDET pin to the GND pin. When the ACDET pin is above 0.6 V and VCC is above UVLO, REGN LDO is present, ACOK comparator and IOUT are both active. |
ACN | 1 | Input current-sense resistor negative input. Place an optional 0.1-µF ceramic capacitor from ACN to GND for common-mode filtering. Place a 0.1-µF ceramic capacitor from ACN to ACP to provide differential-mode filtering. |
ACOK | 5 | AC adapter detect open-drain output. The output is pulled LOW to GND by an internal MOSFET when the voltage on the ACDET pin is above 2.4 V, voltage on the VCC pin is above UVLO and voltage on the VCC pin is 245 mV above the voltage on the SRN pin, indicating a valid adapter is present to start charge. If any one of the above conditions cannot meet, it is pulled HIGH to the external pullup supply rail by an external pullup resistor. Connect a 10-kΩ pullup resistor from the ACOK pin to the pullup supply rail. |
ACP | 2 | Input current-sense resistor positive input. Place a 0.1-µF ceramic capacitor from ACP to GND for common-mode filtering. Place a 0.1-µF ceramic capacitor from ACN to ACP to provide differential-mode filtering. |
BTST | 17 | High-side power MOSFET driver power supply. Connect a 0.047-µF capacitor from BTST to PHASE, and a bootstrap Schottky diode from REGN to BTST. |
CMPIN | 4 | Input of independent comparator. The comparator has one 50-kΏ series resistor and one 2000-kΏ pulldown resistor. Program CMPIN voltage by connecting a resistor-divider from the IOUT pin to the CMPIN pin to the GND pin for adapter or charge current comparison or from the SRN pin to the CMPIN pin to the GND pin for battery voltage comparison. The internal reference is 0.6 V or 2.4 V, selectable by SMBus command ChargeOption(). When CMPIN is above the internal reference, CMPOUT goes HIGH. Place a resistor between CMPIN and CMPOUT to program hysteresis. |
CMPOUT | 3 | Open-drain output of independent comparator. Place a 10-kΩ pullup resistor from CMPOUT to pullup supply rail. Internal reference is 0.6 V or 2.4 V, selectable by SMBus command ChargeOption(). When CMPIN is above the internal reference, CMPOUT goes HIGH. Place a resistor between CMPIN and CMPOUT to program hysteresis. |
GND | 14 | IC ground. On PCB layout, connect to the analog ground plane, and only connect to power ground plane through the PowerPAD™ underneath the IC. |
HIDRV | 18 | High-side power MOSFET driver output. Connect to the high-side N-channel MOSFET gate. |
IFAULT | 11 | Open-drain output. The output is pulled LOW by an internal MOSFET when ACOC or a short-circuit is detected. The output is pulled HIGH to the external pullup supply rail by an external pullup resistor in normal condition. |
ILIM | 10 | Charge current-limit input. Program ILIM voltage by connecting a resistor-divider from the system reference 3.3-V rail to the ILIM pin to the GND pin. The lower of the ILIM voltage or DAC limit voltage sets the charge current regulation limit. To disable control on ILIM, set ILIM above 1.6 V. Once the voltage on the ILIM pin falls below 75 mV, charge is disabled. Charge is enabled when the ILIM pin rises above 105 mV. |
IOUT | 7 | Buffered adapter or charge current output, selectable with SMBus command ChargeOption(). IOUT voltage is 20 times the differential voltage across the sense resistor. Place a 100-pF or less ceramic decoupling capacitor from the IOUT pin to GND. |
LODRV | 15 | Low-side power MOSFET driver output. Connect to low-side N-channel MOSFET gate. |
PHASE | 19 | High-side power MOSFET driver source. Connect to the source of the high-side N-channel MOSFET. |
PowerPAD | Exposed pad beneath the IC. Analog ground and power ground star-connected only at the PowerPAD plane. Always solder PowerPAD to the board, and have vias on the PowerPAD plane connecting to analog ground and power ground planes. The pad also serves as a thermal pad to dissipate the heat. | |
REGN | 16 | Linear regulator output. REGN is the output of the 6-V linear regulator supplied from VCC. The LDO is active when the voltage on the ACDET pin is above 0.6 V and voltage on VCC is above UVLO. Connect a 1-µF ceramic capacitor from REGN to GND. |
SCL | 9 | SMBus open-drain clock input. Connect to the SMBus clock line from the host controller or smart battery. Connect a 10-kΩ pullup resistor according to SMBus specifications. |
SDA | 8 | SMBus open-drain data I/O. Connect to the SMBus data line from the host controller or smart battery. Connect a 10-kΩ pullup resistor according to SMBus specifications. |
SRN | 12 | Charge current-sense resistor negative input. The SRN pin is for battery voltage sensing as well. Connect SRN pin to a 7.5-Ω resistor first then from resistor another terminal connect a 0.1-µF ceramic capacitor to GND for common-mode filtering and connect to current-sensing resistor. Connect a 0.1-µF ceramic capacitor between current sensing resistor to provide differential-mode filtering. See Application and Implementation about negative output voltage protection for hard shorts on battery-to-ground or battery-reverse connection by adding small resistor. |
SRP | 13 | Charge current-sense resistor positive input. Connect SRP pin to a 10-Ω resistor first, then, from resistor another terminal, connect to current-sensing resistor. Connect a 0.1-µF ceramic capacitor between current sensing resistor to provide differential-mode filtering. See Application and Implementation about negative output voltage protection for hard shorts on battery-to-ground or battery-reverse connection by adding small resistor. |
VCC | 20 | Input supply, diode OR from adapter or battery voltage. Use 10-Ω resistor and 1-µF capacitor to ground as low pass filter to limit inrush current. |