JAJSMC8 June 2020 CD54HCT30 , CD74HCT30
PRODUCTION DATA
TTL-Compatible CMOS inputs are high impedance and are typically modeled as a resistor from the input to ground in parallel with the input capacitance given in the GUID-29A86CF2-61CC-4DA6-ADBD-5A45BB01D7BD.html#GUID-29A86CF2-61CC-4DA6-ADBD-5A45BB01D7BD. The worst case resistance is calculated with the maximum input voltage, given in the GUID-9109A501-9F74-447B-B792-D3726A93BC23.html#GUID-9109A501-9F74-447B-B792-D3726A93BC23, and the maximum input leakage current, given in the GUID-29A86CF2-61CC-4DA6-ADBD-5A45BB01D7BD.html#GUID-29A86CF2-61CC-4DA6-ADBD-5A45BB01D7BD, using ohm's law (R = V ÷ I).
Signals applied to the inputs need to have fast edge rates, as defined by Δt/Δv in the GUID-DADFD995-357A-48C4-8F1A-FC8813ADFDB0.html#GUID-DADFD995-357A-48C4-8F1A-FC8813ADFDB0 to avoid excessive current consumption and oscillations. If a slow or noisy input signal is required, a device with a Schmitt-trigger input should be used to condition the input signal prior to the TTL-compatible CMOS input.
TTL-Compatible CMOS inputs have a lower threshold voltage than standard CMOS inputs to allow for compatibility with older bipolar logic devices. See the GUID-DADFD995-357A-48C4-8F1A-FC8813ADFDB0.html#GUID-DADFD995-357A-48C4-8F1A-FC8813ADFDB0 for the valid input voltages for the CD74HCT30.