The voltage-output DAC channels of the DAC53xAxW devices consist of a string architecture with a voltage-output amplifier, as well as an external feedback pin on channel 1. Section 6.2 shows the DAC architecture within the block diagram that operates from a 3-V to 5.5-V power supply. The DAC has an internal voltage reference of 1.21 V. Optionally, use the power supply as a reference. The voltage-output mode supports multiple programmable output ranges.

The DAC53xAxW devices support Hi-Z output when VDD is off, maintaining very low leakage current at the output pins with up to 1.25 V of forced voltage. The DAC output pin also starts up in high-impedance mode by default, making these devices an excellent choice for voltage margining and scaling applications. To change the power-up mode to 10 kΩ-GND or 100 kΩ-GND, program the corresponding DAC-PDN-x field in the COMMON-CONFIG register and load these bits in the device NVM.

The DAC53xAxW devices support comparator mode on channel 1. The FB1 pin acts as an input for the comparator. The DAC architecture supports inversion of the comparator output using register settings. The comparator outputs can be push-pull or open-drain. The comparator mode supports programmable hysteresis using the margin-high and margin-low register fields, latching comparator, and window comparator. The comparator outputs are accessible internally by the device.

Channel 2 functions as a current source with a minimum 770-mV headroom at 300-mA output. Make sure the junction temperature of the device is kept within the recommended limit while using the current output.

The DAC53xAxW devices include a smart feature set to enable processor-less operation and high integration. The NVM enables a predictable start-up. In the absence of a processor or when the processor or software fails, the GPIO triggers the DAC output without the SPI or I²C interface. The integrated functions and the FB1 pin enable PWM output for control applications.