JAJSPX6A August   2017  – February 2023 DLP650NE

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  Storage Conditions
    3. 6.3  ESD Ratings
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Electrical Characteristics
    7. 6.7  Timing Requirements
    8. 6.8  Window Characteristics
    9. 6.9  System Mounting Interface Loads
    10. 6.10 Micromirror Array Physical Characteristics
    11. 6.11 Micromirror Array Optical Characteristics
    12. 6.12 Chipset Component Usage Specification
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Interface
      2. 7.3.2 Timing
    4. 7.4 Device Functional Modes
    5. 7.5 Optical Interface and System Image Quality Considerations
      1. 7.5.1 Numerical Aperture and Stray Light Control
      2. 7.5.2 Pupil Match
      3. 7.5.3 Illumination Overfill
    6. 7.6 Micromirror Array Temperature Calculation
    7. 7.7 Micromirror Landed-On or Landed-Off Duty Cycle
      1. 7.7.1 Definition of Micromirror Landed-On or Landed-Off Duty Cycle
      2. 7.7.2 Landed Duty Cycle and Useful Life of the DMD
      3. 7.7.3 Landed Duty Cycle and Operational DMD Temperature
      4. 7.7.4 Estimating the Long-Term Average Landed Duty Cycle of a Product or Application
        1.       Application and Implementation
          1. 8.1 Application Information
          2. 8.2 Typical Application
            1. 8.2.1 Design Requirements
            2. 8.2.2 Detailed Design Procedure
  8. Power Supply Requirements
    1. 8.1 DMD Power Supply Requirements
    2. 8.2 DMD Power Supply Power-Up Procedure
    3. 8.3 DMD Power Supply Power-Down Procedure
  9. Device Documentation Support
    1. 9.1 サード・パーティ製品に関する免責事項
    2. 9.2 Device Support
      1. 9.2.1 Device Nomenclature
      2. 9.2.2 Device Markings
    3. 9.3 Documentation Support
      1. 9.3.1 Related Documentation
    4. 9.4 Receiving Notification of Documentation Updates
    5. 9.5 サポート・リソース
    6. 9.6 Trademarks
    7. 9.7 静電気放電に関する注意事項
    8. 9.8 用語集
  10. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • FYE|350
サーマルパッド・メカニカル・データ
発注情報

Application Information

Texas Instruments DLP technology is a micro-electro-mechanical systems (MEMS) technology that modulates light using a digital micromirror device (DMD). The DMD is a spatial light modulator, which reflects incoming light from an illumination source to one of two directions, towards the projection optics or collection optics. The large micromirror array size and ceramic package provides great thermal performance for bright display applications. Typical applications using the DLP650NE include home theater, digital signage, interactive display, low-latency gaming display, portable smart displays.

The following orderables have been replaced by the DLP650NE:

Device Information
PART NUMBER PACKAGE(1) BODY SIZE (NOM)

MECHANICAL ICD

DLP650NET FYE (350) 35.0 mm × 32.2 mm × 5.1 mm 2511543

1910-6232E

FYE (350) 35.0 mm × 32.2 mm × 5.1 mm 2511543

1910-6237E

FYE (350) 35.0 mm × 32.2 mm × 5.1 mm 2511543

1910-6239E

FYE (350) 35.0 mm × 32.2 mm × 5.1 mm 2511543

1910-623AE

FYE (350) 35.0 mm × 32.2 mm × 5.1 mm 2511543