JAJSFL2H March 2016 – November 2019 DRA722 , DRA724 , DRA725 , DRA726
PRODUCTION DATA.
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
The Device includes 1 Video Input Ports (VIP).
Table 7-3, Figure 7-4 and Figure 7-5 present timings and switching characteristics of the VIPs.
CAUTION
The I/O timings provided in this section are valid only for VIN1 and VIN2 if signals within a single IOSET are used. The IOSETs are defined in Table 7-4 and Table 7-5.
NO. | PARAMETER | DESCRIPTION | MIN | MAX | UNIT |
---|---|---|---|---|---|
V1 | tc(CLK) | Cycle time, vinx_clki (3)(5) | 6.06 (2) | ns | |
V2 | tw(CLKH) | Pulse duration, vinx_clki high (3)(5) | 0.45 × P (2) | ns | |
V3 | tw(CLKL) | Pulse duration, vinx_clki low (3)(5) | 0.45 × P (2) | ns | |
V4 | tsu(CTL/DATA-CLK) | Input setup time, Control (vinx_dei, vinx_vsynci, vinx_fldi, vinx_hsynci) and Data (vinx_dn) valid to vinx_clki transition (3)(4)(5) | 3.11 (2) | ns | |
V6 | th(CLK-CTL/DATA) | Input hold time, Control (vinx_dei, vinx_vsynci, vinx_fldi, vinx_hsynci) and Data (vinx_dn) valid from vinx_clki transition (3)(4)(5) | -0.05 (2) | ns |
In Table 7-4 and Table 7-5 are presented the specific groupings of signals (IOSET) for use with vin1 and vin2.
SIGNALS | IOSET2 | IOSET3 | IOSET4 (1) | IOSET5(1) | IOSET6(1) | IOSET7(1) | IOSET8 | IOSET9 | IOSET10 | |||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
BALL | MUX | BALL | MUX | BALL | MUX | BALL | MUX | BALL | MUX | BALL | MUX | BALL | MUX | BALL | MUX | BALL | MUX | |
vin1a | ||||||||||||||||||
vin1a_clk0 | P1 | 2 | B11 | 4 | B11 | 3 | P4 | 4 | P4 | 4 | B26 | 8 | AC5 | 9 | E17 | 7 | E17 | 7 |
vin1a_hsync0 | N7 | 2 | C11 | 4 | C11 | 3 | R3 | 4 | P7 | 4 | E21 | 8 | AB8 | 9 | F12 | 7 | F12 | 7 |
vin1a_vsync0 | R4 | 2 | E11 | 4 | E11 | 3 | T2 | 4 | N1 | 4 | F20 | 8 | AB5 | 9 | G12 | 7 | G12 | 7 |
vin1a_fld0 | P9 | 2 | D11 | 4 | D11 | 3 | P9 | 4 | J7 | 4 | F21 | 8 | C17 | 9 | C14 | 7 | C14 | 7 |
vin1a_de0 | N9 | 2 | B10 | 4 | B10 | 3 | P7 | 5 | H6 | 4 | C23 | 8 | AB4 | 9 | D14 | 7 | D14 | 7 |
vin1a_d0 | M6 | 2 | B7 | 4 | B7 | 3 | R6 | 4 | R6 | 4 | B14 | 8 | AD6 | 9 | D18 | 7 | C17 | 7 |
vin1a_d1 | M2 | 2 | B8 | 4 | B8 | 3 | T9 | 4 | T9 | 4 | J14 | 8 | AC8 | 9 | B19 | 7 | B19 | 7 |
vin1a_d2 | L5 | 2 | A7 | 4 | A7 | 3 | T6 | 4 | T6 | 4 | G13 | 8 | AC3 | 9 | F15 | 7 | F15 | 7 |
vin1a_d3 | M1 | 2 | A8 | 4 | A8 | 3 | T7 | 4 | T7 | 4 | J11 | 8 | AC9 | 9 | B18 | 7 | B18 | 7 |
vin1a_d4 | L6 | 2 | C9 | 4 | C9 | 3 | P6 | 4 | P6 | 4 | E12 | 8 | AC6 | 9 | A16 | 7 | A16 | 7 |
vin1a_d5 | L4 | 2 | A9 | 4 | A9 | 3 | R9 | 4 | R9 | 4 | F13 | 8 | AC7 | 9 | C15 | 7 | C15 | 7 |
vin1a_d6 | L3 | 2 | B9 | 4 | B9 | 3 | R5 | 4 | R5 | 4 | C12 | 8 | AC4 | 9 | A18 | 7 | A18 | 7 |
vin1a_d7 | L2 | 2 | A10 | 4 | A10 | 3 | P5 | 4 | P5 | 4 | D12 | 8 | AD4 | 9 | A19 | 7 | A19 | 7 |
vin1a_d8 | L1 | 2 | E8 | 4 | E8 | 3 | U2 | 4 | U2 | 4 | E15 | 8 | AA4 | 9 | F14 | 7 | F14 | 7 |
vin1a_d9 | K2 | 2 | D9 | 4 | D9 | 3 | U1 | 4 | U1 | 4 | A20 | 8 | AB3 | 9 | G14 | 7 | G14 | 7 |
vin1a_d10 | J1 | 2 | D7 | 4 | D7 | 3 | P3 | 4 | P3 | 4 | B15 | 8 | AB9 | 9 | A13 | 7 | A13 | 7 |
vin1a_d11 | J2 | 2 | D8 | 4 | D8 | 3 | R2 | 4 | R2 | 4 | A15 | 8 | AA3 | 9 | E14 | 7 | E14 | 7 |
vin1a_d12 | H1 | 2 | A5 | 4 | A5 | 3 | K7 | 4 | K7 | 4 | D15 | 8 | D17 | 9 | A12 | 7 | A12 | 7 |
vin1a_d13 | J3 | 2 | C6 | 4 | C6 | 3 | M7 | 4 | M7 | 4 | B16 | 8 | G16 | 9 | B13 | 7 | B13 | 7 |
vin1a_d14 | H2 | 2 | C8 | 4 | C8 | 3 | J5 | 4 | J5 | 4 | B17 | 8 | A21 | 9 | A11 | 7 | A11 | 7 |
vin1a_d15 | H3 | 2 | C7 | 4 | C7 | 3 | K6 | 4 | K6 | 4 | A17 | 8 | C18 | 9 | B12 | 7 | B12 | 7 |
vin1a_d16 | R6 | 2 | F11 | 4 | F11 | 3 | C18 | 8 | ||||||||||
vin1a_d17 | T9 | 2 | G10 | 4 | G10 | 3 | A21 | 8 | ||||||||||
vin1a_d18 | T6 | 2 | F10 | 4 | F10 | 3 | G16 | 8 | ||||||||||
vin1a_d19 | T7 | 2 | G11 | 4 | G11 | 3 | D17 | 8 | ||||||||||
vin1a_d20 | P6 | 2 | E9 | 4 | E9 | 3 | AA3 | 8 | ||||||||||
vin1a_d21 | R9 | 2 | F9 | 4 | F9 | 3 | AB9 | 8 | ||||||||||
vin1a_d22 | R5 | 2 | F8 | 4 | F8 | 3 | AB3 | 8 | ||||||||||
vin1a_d23 | P5 | 2 | E7 | 4 | E7 | 3 | AA4 | 8 | ||||||||||
vin1b | ||||||||||||||||||
vin1b_clk1 | P7 | 6 | M4 | 4 | V1 | 5 | N9 | 6 | ||||||||||
vin1b_hsync1 | H5 | 6 | H5 | 6 | U7 | 5 | N7 | 6 | ||||||||||
vin1b_vsync1 | H6 | 6 | H6 | 6 | V6 | 5 | R4 | 6 | ||||||||||
vin1b_fld1 | M4 | 6 | W2 | 5 | P4 | 6 | ||||||||||||
vin1b_de1 | N6 | 6 | N6 | 6 | V7 | 5 | P9 | 6 | ||||||||||
vin1b_d0 | K7 | 6 | K7 | 6 | U4 | 5 | R6 | 6 | ||||||||||
vin1b_d1 | M7 | 6 | M7 | 6 | V2 | 5 | T9 | 6 | ||||||||||
vin1b_d2 | J5 | 6 | J5 | 6 | Y1 | 5 | T6 | 6 | ||||||||||
vin1b_d3 | K6 | 6 | K6 | 6 | W9 | 5 | T7 | 6 | ||||||||||
vin1b_d4 | J7 | 6 | J7 | 6 | V9 | 5 | P6 | 6 | ||||||||||
vin1b_d5 | J4 | 6 | J4 | 6 | U5 | 5 | R9 | 6 | ||||||||||
vin1b_d6 | J6 | 6 | J6 | 6 | V5 | 5 | R5 | 6 | ||||||||||
vin1b_d7 | H4 | 6 | H4 | 6 | V4 | 5 | P5 | 6 |
SIGNALS | IOSET1 | IOSET2 | IOSET4 | IOSET5 | IOSET6 | IOSET7(1) | IOSET8(1) | IOSET9(1) | IOSET10(1) | |||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
BALL | MUX | BALL | MUX | BALL | MUX | BALL | MUX | BALL | MUX | BALL | MUX | BALL | MUX | BALL | MUX | BALL | MUX | |
vin2a | ||||||||||||||||||
vin2a_clk0 | E1 | 0 | E1 | 0 | V1 | 4 | B11 | 3 | P4 | 4 | P4 | 4 | B26 | 8 | ||||
vin2a_hsync0 | G1 | 0 | G1 | 0 | U7 | 4 | C11 | 3 | R3 | 4 | P7 | 4 | E21 | 8 | ||||
vin2a_vsync0 | G6 | 0 | G6 | 0 | V6 | 4 | E11 | 3 | T2 | 4 | N1 | 4 | F20 | 8 | ||||
vin2a_fld0 | H7 | 0 | G2 | 1 | W2 | 4 | D11 | 3 | P9 | 4 | J7 | 4 | F21 | 8 | ||||
vin2a_de0 | G2 | 0 | V7 | 4 | B10 | 3 | P7 | 5 | H6 | 4 | C23 | 8 | ||||||
vin2a_d0 | F2 | 0 | F2 | 0 | U4 | 4 | B7 | 3 | R6 | 4 | R6 | 4 | B14 | 8 | ||||
vin2a_d1 | F3 | 0 | F3 | 0 | V2 | 4 | B8 | 3 | T9 | 4 | T9 | 4 | J14 | 8 | ||||
vin2a_d2 | D1 | 0 | D1 | 0 | Y1 | 4 | A7 | 3 | T6 | 4 | T6 | 4 | G13 | 8 | ||||
vin2a_d3 | E2 | 0 | E2 | 0 | W9 | 4 | A8 | 3 | T7 | 4 | T7 | 4 | J11 | 8 | ||||
vin2a_d4 | D2 | 0 | D2 | 0 | V9 | 4 | C9 | 3 | P6 | 4 | P6 | 4 | E12 | 8 | ||||
vin2a_d5 | F4 | 0 | F4 | 0 | U5 | 4 | A9 | 3 | R9 | 4 | R9 | 4 | F13 | 8 | ||||
vin2a_d6 | C1 | 0 | C1 | 0 | V5 | 4 | B9 | 3 | R5 | 4 | R5 | 4 | C12 | 8 | ||||
vin2a_d7 | E4 | 0 | E4 | 0 | V4 | 4 | A10 | 3 | P5 | 4 | P5 | 4 | D12 | 8 | ||||
vin2a_d8 | F5 | 0 | F5 | 0 | V3 | 4 | E8 | 3 | U2 | 4 | U2 | 4 | E15 | 8 | ||||
vin2a_d9 | E6 | 0 | E6 | 0 | Y2 | 4 | D9 | 3 | U1 | 4 | U1 | 4 | A20 | 8 | ||||
vin2a_d10 | D3 | 0 | D3 | 0 | U6 | 4 | D7 | 3 | P3 | 4 | P3 | 4 | B15 | 8 | ||||
vin2a_d11 | F6 | 0 | F6 | 0 | U3 | 4 | D8 | 3 | R2 | 4 | R2 | 4 | A15 | 8 | ||||
vin2a_d12 | D5 | 0 | D5 | 0 | A5 | 3 | K7 | 4 | K7 | 4 | D15 | 8 | ||||||
vin2a_d13 | C2 | 0 | C2 | 0 | C6 | 3 | M7 | 4 | M7 | 4 | B16 | 8 | ||||||
vin2a_d14 | C3 | 0 | C3 | 0 | C8 | 3 | J5 | 4 | J5 | 4 | B17 | 8 | ||||||
vin2a_d15 | C4 | 0 | C4 | 0 | C7 | 3 | K6 | 4 | K6 | 4 | A17 | 8 | ||||||
vin2a_d16 | B2 | 0 | B2 | 0 | F11 | 3 | C18 | 8 | ||||||||||
vin2a_d17 | D6 | 0 | D6 | 0 | G10 | 3 | A21 | 8 | ||||||||||
vin2a_d18 | C5 | 0 | C5 | 0 | F10 | 3 | G16 | 8 | ||||||||||
vin2a_d19 | A3 | 0 | A3 | 0 | G11 | 3 | D17 | 8 | ||||||||||
vin2a_d20 | B3 | 0 | B3 | 0 | E9 | 3 | AA3 | 8 | ||||||||||
vin2a_d21 | B4 | 0 | B4 | 0 | F9 | 3 | AB9 | 8 | ||||||||||
vin2a_d22 | B5 | 0 | B5 | 0 | F8 | 3 | AB3 | 8 | ||||||||||
vin2a_d23 | A4 | 0 | A4 | 0 | E7 | 3 | AA4 | 8 | ||||||||||
vin2b | ||||||||||||||||||
vin2b_clk1 | P7 | 6 | M4 | 4 | H7 | 2 | H7 | 2 | AB5 | 4 | ||||||||
vin2b_hsync1 | H5 | 6 | H5 | 6 | G1 | 3 | G1 | 3 | AC5 | 4 | ||||||||
vin2b_vsync1 | H6 | 6 | H6 | 6 | G6 | 3 | G6 | 3 | AB4 | 4 | ||||||||
vin2b_fld1 | M4 | 6 | G2 | 2 | ||||||||||||||
vin2b_de1 | N6 | 6 | N6 | 6 | G2 | 3 | AB8 | 4 | ||||||||||
vin2b_d0 | K7 | 6 | K7 | 6 | A4 | 2 | A4 | 2 | AD6 | 4 | ||||||||
vin2b_d1 | M7 | 6 | M7 | 6 | B5 | 2 | B5 | 2 | AC8 | 4 | ||||||||
vin2b_d2 | J5 | 6 | J5 | 6 | B4 | 2 | B4 | 2 | AC3 | 4 | ||||||||
vin2b_d3 | K6 | 6 | K6 | 6 | B3 | 2 | B3 | 2 | AC9 | 4 | ||||||||
vin2b_d4 | J7 | 6 | J7 | 6 | A3 | 2 | A3 | 2 | AC6 | 4 | ||||||||
vin2b_d5 | J4 | 6 | J4 | 6 | C5 | 2 | C5 | 2 | AC7 | 4 | ||||||||
vin2b_d6 | J6 | 6 | J6 | 6 | D6 | 2 | D6 | 2 | AC4 | 4 | ||||||||
vin2b_d7 | H4 | 6 | H4 | 6 | B2 | 2 | B2 | 2 | AD4 | 4 |
NOTE
To configure the desired Manual IO Timing Mode the user must follow the steps described in section "Manual IO Timing Modes" in the device TRM.
The associated registers to configure are listed in the CFG REGISTER column. For more information, see Control Module chapter in the device TRM.
Manual IO Timings Modes must be used to ensure some IO timings for VIP1. See Table 7-2Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Manual Functions Mapping for VIP1 1A IOSET7 and 2A IOSET10 for a definition of the Manual modes.
Table 7-6 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers.
BALL | BALL NAME | VIP_MANUAL1 | VIP_MANUAL2 | CFG REGISTER | MUXMODE | |||
---|---|---|---|---|---|---|---|---|
A_DELAY (ps) | G_DELAY (ps) | A_DELAY (ps) | G_DELAY (ps) | 8 | 8(1) | |||
E21 | gpio6_14 | 1400 | 240 | 1767 | 0 | CFG_GPIO6_14_IN | vin2a_hsync0 | vin1a_hsync0 |
F20 | gpio6_15 | 1170 | 240 | 1522 | 0 | CFG_GPIO6_15_IN | vin2a_vsync0 | vin1a_vsync0 |
F21 | gpio6_16 | 1470 | 0 | 1600 | 0 | CFG_GPIO6_16_IN | vin2a_fld0 | vin1a_fld0 |
B14 | mcasp1_aclkr | 2145 | 200 | 2509 | 0 | CFG_MCASP1_ACLKR_IN | vin2a_d0 | vin1a_d0 |
G13 | mcasp1_axr2 | 2740 | 900 | 2680 | 1180 | CFG_MCASP1_AXR2_IN | vin2a_d2 | vin1a_d2 |
J11 | mcasp1_axr3 | 2933 | 200 | 2700 | 600 | CFG_MCASP1_AXR3_IN | vin2a_d3 | vin1a_d3 |
E12 | mcasp1_axr4 | 2901 | 240 | 2660 | 700 | CFG_MCASP1_AXR4_IN | vin2a_d4 | vin1a_d4 |
F13 | mcasp1_axr5 | 2600 | 840 | 2640 | 920 | CFG_MCASP1_AXR5_IN | vin2a_d5 | vin1a_d5 |
C12 | mcasp1_axr6 | 2718 | 240 | 3081 | 0 | CFG_MCASP1_AXR6_IN | vin2a_d6 | vin1a_d6 |
D12 | mcasp1_axr7 | 2983 | 240 | 2540 | 800 | CFG_MCASP1_AXR7_IN | vin2a_d7 | vin1a_d7 |
J14 | mcasp1_fsr | 2203 | 240 | 2566 | 0 | CFG_MCASP1_FSR_IN | vin2a_d1 | vin1a_d1 |
E15 | mcasp2_aclkr | 2143 | 240 | 2492 | 0 | CFG_MCASP2_ACLKR_IN | vin2a_d8 | vin1a_d8 |
B15 | mcasp2_axr0 | 2543 | 240 | 2905 | 0 | CFG_MCASP2_AXR0_IN | vin2a_d10 | vin1a_d10 |
A15 | mcasp2_axr1 | 2664 | 240 | 2730 | 400 | CFG_MCASP2_AXR1_IN | vin2a_d11 | vin1a_d11 |
D15 | mcasp2_axr4 | 2792 | 240 | 2750 | 400 | CFG_MCASP2_AXR4_IN | vin2a_d12 | vin1a_d12 |
B16 | mcasp2_axr5 | 2621 | 300 | 2983 | 0 | CFG_MCASP2_AXR5_IN | vin2a_d13 | vin1a_d13 |
B17 | mcasp2_axr6 | 1903 | 100 | 2086 | 0 | CFG_MCASP2_AXR6_IN | vin2a_d14 | vin1a_d14 |
A17 | mcasp2_axr7 | 2928 | 200 | 2670 | 700 | CFG_MCASP2_AXR7_IN | vin2a_d15 | vin1a_d15 |
A20 | mcasp2_fsr | 2291 | 200 | 2654 | 0 | CFG_MCASP2_FSR_IN | vin2a_d9 | vin1a_d9 |
C18 | mcasp4_aclkx | 1433 | 0 | 1540 | 0 | CFG_MCASP4_ACLKX_IN | vin2a_d16 | vin1a_d16 |
G16 | mcasp4_axr0 | 2500 | 0 | 2560 | 0 | CFG_MCASP4_AXR0_IN | vin2a_d18 | vin1a_d18 |
D17 | mcasp4_axr1 | 2379 | 100 | 2599 | 0 | CFG_MCASP4_AXR1_IN | vin2a_d19 | vin1a_d19 |
A21 | mcasp4_fsx | 1500 | 1400 | 1900 | 1040 | CFG_MCASP4_FSX_IN | vin2a_d17 | vin1a_d17 |
AA3 | mcasp5_aclkx | 3740 | 1850 | 3900 | 1700 | CFG_MCASP5_ACLKX_IN | vin2a_d20 | vin1a_d20 |
AB3 | mcasp5_axr0 | 3800 | 2760 | 3800 | 2800 | CFG_MCASP5_AXR0_IN | vin2a_d22 | vin1a_d22 |
AA4 | mcasp5_axr1 | 4099 | 2500 | 3900 | 2870 | CFG_MCASP5_AXR1_IN | vin2a_d23 | vin1a_d23 |
AB9 | mcasp5_fsx | 3740 | 2100 | 3860 | 2060 | CFG_MCASP5_FSX_IN | vin2a_d21 | vin1a_d21 |
B26 | xref_clk2 | 0 | 0 | 0 | 0 | CFG_XREF_CLK2_IN | vin2a_clk0 | vin1a_clk0 |
C23 | xref_clk3 | 1440 | 0 | 1623 | 0 | CFG_XREF_CLK3_IN | vin2a_de0 | vin1a_de0 |
Manual IO Timings Modes must be used to ensure some IO timings for VIP1. See Table 7-2Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 7-7Manual Functions Mapping for VIN2A (IOSET4/5/6) for a definition of the Manual modes.
Table 7-7 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers.
BALL | BALL NAME | VIP_MANUAL3 | VIP_MANUAL5 | CFG REGISTER | MUXMODE | ||||||
---|---|---|---|---|---|---|---|---|---|---|---|
A_DELAY (ps) | G_DELAY (ps) | A_DELAY (ps) | G_DELAY (ps) | 0 | 1 | 2 | 3 | 4 | |||
U3 | RMII_MHZ_50_CLK | 2616 | 1379 | 2798 | 1294 | CFG_RMII_MHZ_50_CLK_IN | - | - | - | - | vin2a_d11 |
U4 | mdio_d | 2558 | 1105 | 2790 | 954 | CFG_MDIO_D_IN | - | - | - | - | vin2a_d0 |
V1 | mdio_mclk | 998 | 463 | 1029 | 431 | CFG_MDIO_MCLK_IN | - | - | - | - | vin2a_clk0 |
U5 | rgmii0_rxc | 2658 | 862 | 2896 | 651 | CFG_RGMII0_RXC_IN | - | - | - | - | vin2a_d5 |
V5 | rgmii0_rxctl | 2658 | 1628 | 2844 | 1518 | CFG_RGMII0_RXCTL_IN | - | - | - | - | vin2a_d6 |
W2 | rgmii0_rxd0 | 2638 | 1123 | 2856 | 888 | CFG_RGMII0_RXD0_IN | - | - | - | - | vin2a_fld0 |
Y2 | rgmii0_rxd1 | 2641 | 1737 | 2804 | 1702 | CFG_RGMII0_RXD1_IN | - | - | - | - | vin2a_d9 |
V3 | rgmii0_rxd2 | 2641 | 1676 | 2801 | 1652 | CFG_RGMII0_RXD2_IN | - | - | - | - | vin2a_d8 |
V4 | rgmii0_rxd3 | 2644 | 1828 | 2807 | 1790 | CFG_RGMII0_RXD3_IN | - | - | - | - | vin2a_d7 |
W9 | rgmii0_txc | 2638 | 1454 | 2835 | 1396 | CFG_RGMII0_TXC_IN | - | - | - | - | vin2a_d3 |
V9 | rgmii0_txctl | 2672 | 1663 | 2831 | 1640 | CFG_RGMII0_TXCTL_IN | - | - | - | - | vin2a_d4 |
U6 | rgmii0_txd0 | 2604 | 1442 | 2764 | 1417 | CFG_RGMII0_TXD0_IN | - | - | - | - | vin2a_d10 |
V6 | rgmii0_txd1 | 2683 | 1598 | 2843 | 1600 | CFG_RGMII0_TXD1_IN | - | - | - | - | vin2a_vsync0 |
U7 | rgmii0_txd2 | 2563 | 1483 | 2816 | 1344 | CFG_RGMII0_TXD2_IN | - | - | - | - | vin2a_hsync0 |
V7 | rgmii0_txd3 | 2717 | 1461 | 2913 | 1310 | CFG_RGMII0_TXD3_IN | - | - | - | - | vin2a_de0 |
V2 | uart3_rxd | 2445 | 1145 | 2743 | 923 | CFG_UART3_RXD_IN | - | - | - | - | vin2a_d1 |
Y1 | uart3_txd | 2650 | 1197 | 2842 | 1080 | CFG_UART3_TXD_IN | - | - | - | - | vin2a_d2 |
E1 | vin2a_clk0 | 0 | 0 | 0 | 0 | CFG_VIN2A_CLK0_IN | vin2a_clk0 | - | - | - | - |
F2 | vin2a_d0 | 1812 | 102 | 1936 | 0 | CFG_VIN2A_D0_IN | vin2a_d0 | - | - | - | - |
F3 | vin2a_d1 | 1701 | 439 | 2229 | 10 | CFG_VIN2A_D1_IN | vin2a_d1 | - | - | - | - |
D3 | vin2a_d10 | 1720 | 215 | 2031 | 0 | CFG_VIN2A_D10_IN | vin2a_d10 | - | - | - | - |
F6 | vin2a_d11 | 1622 | 0 | 1702 | 0 | CFG_VIN2A_D11_IN | vin2a_d11 | - | - | - | - |
D5 | vin2a_d12 | 1350 | 412 | 1819 | 0 | CFG_VIN2A_D12_IN | vin2a_d12 | - | - | - | - |
C2 | vin2a_d13 | 1613 | 147 | 1476 | 260 | CFG_VIN2A_D13_IN | vin2a_d13 | - | - | - | - |
C3 | vin2a_d14 | 1149 | 516 | 1701 | 0 | CFG_VIN2A_D14_IN | vin2a_d14 | - | - | - | - |
C4 | vin2a_d15 | 1530 | 450 | 2021 | 0 | CFG_VIN2A_D15_IN | vin2a_d15 | - | - | - | - |
B2 | vin2a_d16 | 1512 | 449 | 2044 | 11 | CFG_VIN2A_D16_IN | vin2a_d16 | - | vin2b_d7 | - | - |
D6 | vin2a_d17 | 1293 | 488 | 1839 | 5 | CFG_VIN2A_D17_IN | vin2a_d17 | - | vin2b_d6 | - | - |
C5 | vin2a_d18 | 2140 | 371 | 2494 | 0 | CFG_VIN2A_D18_IN | vin2a_d18 | - | vin2b_d5 | - | - |
A3 | vin2a_d19 | 2041 | 275 | 1699 | 611 | CFG_VIN2A_D19_IN | vin2a_d19 | - | vin2b_d4 | - | - |
D1 | vin2a_d2 | 1675 | 35 | 1736 | 0 | CFG_VIN2A_D2_IN | vin2a_d2 | - | - | - | - |
B3 | vin2a_d20 | 1972 | 441 | 2412 | 88 | CFG_VIN2A_D20_IN | vin2a_d20 | - | vin2b_d3 | - | - |
B4 | vin2a_d21 | 1957 | 556 | 2391 | 161 | CFG_VIN2A_D21_IN | vin2a_d21 | - | vin2b_d2 | - | - |
B5 | vin2a_d22 | 2011 | 433 | 2446 | 102 | CFG_VIN2A_D22_IN | vin2a_d22 | - | vin2b_d1 | - | - |
A4 | vin2a_d23 | 1962 | 523 | 2395 | 145 | CFG_VIN2A_D23_IN | vin2a_d23 | - | vin2b_d0 | - | - |
E2 | vin2a_d3 | 1457 | 361 | 1943 | 0 | CFG_VIN2A_D3_IN | vin2a_d3 | - | - | - | - |
D2 | vin2a_d4 | 1535 | 0 | 1601 | 0 | CFG_VIN2A_D4_IN | vin2a_d4 | - | - | - | - |
F4 | vin2a_d5 | 1676 | 271 | 2052 | 0 | CFG_VIN2A_D5_IN | vin2a_d5 | - | - | - | - |
C1 | vin2a_d6 | 1513 | 0 | 1571 | 0 | CFG_VIN2A_D6_IN | vin2a_d6 | - | - | - | - |
E4 | vin2a_d7 | 1616 | 141 | 1855 | 0 | CFG_VIN2A_D7_IN | vin2a_d7 | - | - | - | - |
F5 | vin2a_d8 | 1286 | 437 | 1224 | 618 | CFG_VIN2A_D8_IN | vin2a_d8 | - | - | - | - |
E6 | vin2a_d9 | 1544 | 265 | 1373 | 509 | CFG_VIN2A_D9_IN | vin2a_d9 | - | - | - | - |
G2 | vin2a_de0 | 1732 | 208 | 1949 | 0 | CFG_VIN2A_DE0_IN | vin2a_de0 | vin2a_fld0 | vin2b_fld1 | vin2b_de1 | - |
H7 | vin2a_fld0 | 1461 | 562 | 1983 | 151 | CFG_VIN2A_FLD0_IN | vin2a_fld0 | - | vin2b_clk1 | - | - |
G1 | vin2a_hsync0 | 1877 | 0 | 1943 | 0 | CFG_VIN2A_HSYNC0_IN | vin2a_hsync0 | - | - | vin2b_hsync1 | - |
G6 | vin2a_vsync0 | 1566 | 0 | 1612 | 0 | CFG_VIN2A_VSYNC0_IN | vin2a_vsync0 | - | - | vin2b_vsync1 | - |
Manual IO Timings Modes must be used to ensure some IO timings for VIP1. See Table 7-2Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 7-8Manual Functions Mapping for VIN2B (IOSET7/8/9) for a definition of the Manual modes.
Table 7-8 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers.
BALL | BALL NAME | VIP_MANUAL4 | VIP_MANUAL6 | CFG REGISTER | MUXMODE | ||||
---|---|---|---|---|---|---|---|---|---|
A_DELAY (ps) | G_DELAY (ps) | A_DELAY (ps) | G_DELAY (ps) | 2 | 3 | 4 | |||
AC5 | gpio6_10 | 2829 | 884 | 3009 | 892 | CFG_GPIO6_10_IN | - | - | vin2b_hsync1 |
AB4 | gpio6_11 | 2648 | 1033 | 2890 | 1096 | CFG_GPIO6_11_IN | - | - | vin2b_vsync1 |
AD4 | mmc3_clk | 2794 | 1074 | 2997 | 1089 | CFG_MMC3_CLK_IN | - | - | vin2b_d7 |
AC4 | mmc3_cmd | 2789 | 1162 | 2959 | 1210 | CFG_MMC3_CMD_IN | - | - | vin2b_d6 |
AC7 | mmc3_dat0 | 2689 | 1180 | 2897 | 1269 | CFG_MMC3_DAT0_IN | - | - | vin2b_d5 |
AC6 | mmc3_dat1 | 2605 | 1219 | 2891 | 1219 | CFG_MMC3_DAT1_IN | - | - | vin2b_d4 |
AC9 | mmc3_dat2 | 2616 | 703 | 2947 | 590 | CFG_MMC3_DAT2_IN | - | - | vin2b_d3 |
AC3 | mmc3_dat3 | 2760 | 1235 | 2931 | 1342 | CFG_MMC3_DAT3_IN | - | - | vin2b_d2 |
AC8 | mmc3_dat4 | 2757 | 880 | 2979 | 891 | CFG_MMC3_DAT4_IN | - | - | vin2b_d1 |
AD6 | mmc3_dat5 | 2688 | 1177 | 2894 | 1262 | CFG_MMC3_DAT5_IN | - | - | vin2b_d0 |
AB8 | mmc3_dat6 | 2638 | 1165 | 2894 | 1187 | CFG_MMC3_DAT6_IN | - | - | vin2b_de1 |
AB5 | mmc3_dat7 | 995 | 182 | 1202 | 107 | CFG_MMC3_DAT7_IN | - | - | vin2b_clk1 |
B2 | vin2a_d16 | 1423 | 0 | 1739 | 0 | CFG_VIN2A_D16_IN | vin2b_d7 | - | - |
D6 | vin2a_d17 | 1253 | 0 | 1568 | 0 | CFG_VIN2A_D17_IN | vin2b_d6 | - | - |
C5 | vin2a_d18 | 2080 | 0 | 2217 | 0 | CFG_VIN2A_D18_IN | vin2b_d5 | - | - |
A3 | vin2a_d19 | 1849 | 0 | 2029 | 0 | CFG_VIN2A_D19_IN | vin2b_d4 | - | - |
B3 | vin2a_d20 | 1881 | 50 | 2202 | 0 | CFG_VIN2A_D20_IN | vin2b_d3 | - | - |
B4 | vin2a_d21 | 1917 | 167 | 2313 | 0 | CFG_VIN2A_D21_IN | vin2b_d2 | - | - |
B5 | vin2a_d22 | 1955 | 79 | 2334 | 0 | CFG_VIN2A_D22_IN | vin2b_d1 | - | - |
A4 | vin2a_d23 | 1899 | 145 | 2288 | 0 | CFG_VIN2A_D23_IN | vin2b_d0 | - | - |
G2 | vin2a_de0 | 1568 | 261 | 2048 | 0 | CFG_VIN2A_DE0_IN | vin2b_fld1 | vin2b_de1 | - |
H7 | vin2a_fld0 | 0 | 0 | 0 | 0 | CFG_VIN2A_FLD0_IN | vin2b_clk1 | - | - |
G1 | vin2a_hsync0 | 1793 | 0 | 2011 | 0 | CFG_VIN2A_HSYNC0_IN | - | vin2b_hsync1 | - |
G6 | vin2a_vsync0 | 1382 | 0 | 1632 | 0 | CFG_VIN2A_VSYNC0_IN | - | vin2b_vsync1 | - |
Manual IO Timings Modes must be used to ensure some IO timings for VIP1. See Table 7-2Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 7-9Manual Functions Mapping for VIN1A (IOSET2/3/4) and VIN1B (IOSET4/7) and VIN2B (IOSET1/10) for a definition of the Manual modes.
Table 7-9 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers.
BALL | BALL NAME | VIP_MANUAL7 | VIP_MANUAL12 | CFG REGISTER | MUXMODE | |||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
A_DELAY (ps) | G_DELAY (ps) | A_DELAY (ps) | G_DELAY (ps) | 2 | 3(1) | 3(1) | 4(1) | 4(1) | 5 | 6(1) | 6(1) | |||
R6 | gpmc_a0 | 3080 | 1792 | 3376 | 1632 | CFG_GPMC_A0_IN | vin1a_d16 | - | - | vin2a_d0 | - | - | vin1b_d0 | - |
T9 | gpmc_a1 | 2958 | 1890 | 3249 | 1749 | CFG_GPMC_A1_IN | vin1a_d17 | - | - | vin2a_d1 | - | - | vin1b_d1 | - |
N9 | gpmc_a10 | 3073 | 1653 | 3388 | 1433 | CFG_GPMC_A10_IN | vin1a_de0 | - | - | - | - | - | vin1b_clk1 | - |
P9 | gpmc_a11 | 3014 | 1784 | 3290 | 1693 | CFG_GPMC_A11_IN | vin1a_fld0 | - | - | vin2a_fld0 | vin1a_fld0 | - | vin1b_de1 | - |
K7 | gpmc_a19 | 1385 | 0 | 1246 | 0 | CFG_GPMC_A19_IN | - | - | - | vin2a_d12 | - | - | vin2b_d0 | vin1b_d0 |
T6 | gpmc_a2 | 3041 | 1960 | 3322 | 1850 | CFG_GPMC_A2_IN | vin1a_d18 | - | - | vin2a_d2 | - | - | vin1b_d2 | - |
M7 | gpmc_a20 | 859 | 0 | 720 | 0 | CFG_GPMC_A20_IN | - | - | - | vin2a_d13 | - | - | vin2b_d1 | vin1b_d1 |
J5 | gpmc_a21 | 1465 | 0 | 1334 | 0 | CFG_GPMC_A21_IN | - | - | - | vin2a_d14 | - | - | vin2b_d2 | vin1b_d2 |
K6 | gpmc_a22 | 1210 | 0 | 1064 | 0 | CFG_GPMC_A22_IN | - | - | - | vin2a_d15 | - | - | vin2b_d3 | vin1b_d3 |
J7 | gpmc_a23 | 1111 | 0 | 954 | 0 | CFG_GPMC_A23_IN | - | - | - | vin2a_fld0 | - | - | vin2b_d4 | vin1b_d4 |
J4 | gpmc_a24 | 1137 | 0 | 1051 | 0 | CFG_GPMC_A24_IN | - | - | - | - | - | - | vin2b_d5 | vin1b_d5 |
J6 | gpmc_a25 | 1402 | 0 | 1283 | 0 | CFG_GPMC_A25_IN | - | - | - | - | - | - | vin2b_d6 | vin1b_d6 |
H4 | gpmc_a26 | 1298 | 0 | 1153 | 0 | CFG_GPMC_A26_IN | - | - | - | - | - | - | vin2b_d7 | vin1b_d7 |
H5 | gpmc_a27 | 934 | 0 | 870 | 0 | CFG_GPMC_A27_IN | - | - | - | - | - | - | vin2b_hsync1 | vin1b_hsync1 |
T7 | gpmc_a3 | 3019 | 2145 | 3296 | 2050 | CFG_GPMC_A3_IN | vin1a_d19 | - | - | vin2a_d3 | - | - | vin1b_d3 | - |
P6 | gpmc_a4 | 3063 | 1981 | 3357 | 1829 | CFG_GPMC_A4_IN | vin1a_d20 | - | - | vin2a_d4 | - | - | vin1b_d4 | - |
R9 | gpmc_a5 | 3021 | 1954 | 3304 | 1840 | CFG_GPMC_A5_IN | vin1a_d21 | - | - | vin2a_d5 | - | - | vin1b_d5 | - |
R5 | gpmc_a6 | 3062 | 1716 | 3348 | 1592 | CFG_GPMC_A6_IN | vin1a_d22 | - | - | vin2a_d6 | - | - | vin1b_d6 | - |
P5 | gpmc_a7 | 3260 | 1889 | 3583 | 1631 | CFG_GPMC_A7_IN | vin1a_d23 | - | - | vin2a_d7 | - | - | vin1b_d7 | - |
N7 | gpmc_a8 | 3033 | 1702 | 3328 | 1547 | CFG_GPMC_A8_IN | vin1a_hsync0 | - | - | - | - | - | vin1b_hsync1 | - |
R4 | gpmc_a9 | 2991 | 1905 | 3281 | 1766 | CFG_GPMC_A9_IN | vin1a_vsync0 | - | - | - | - | - | vin1b_vsync1 | - |
M6 | gpmc_ad0 | 2907 | 1342 | 3181 | 1255 | CFG_GPMC_AD0_IN | vin1a_d0 | - | - | - | - | - | - | - |
M2 | gpmc_ad1 | 2858 | 1321 | 3132 | 1234 | CFG_GPMC_AD1_IN | vin1a_d1 | - | - | - | - | - | - | - |
J1 | gpmc_ad10 | 2920 | 1384 | 3223 | 1204 | CFG_GPMC_AD10_IN | vin1a_d10 | - | - | - | - | - | - | - |
J2 | gpmc_ad11 | 2719 | 1310 | 3019 | 1198 | CFG_GPMC_AD11_IN | vin1a_d11 | - | - | - | - | - | - | - |
H1 | gpmc_ad12 | 2845 | 1135 | 3160 | 917 | CFG_GPMC_AD12_IN | vin1a_d12 | - | - | - | - | - | - | - |
J3 | gpmc_ad13 | 2765 | 1225 | 3045 | 1119 | CFG_GPMC_AD13_IN | vin1a_d13 | - | - | - | - | - | - | - |
H2 | gpmc_ad14 | 2845 | 1150 | 3153 | 952 | CFG_GPMC_AD14_IN | vin1a_d14 | - | - | - | - | - | - | - |
H3 | gpmc_ad15 | 2766 | 1453 | 3044 | 1355 | CFG_GPMC_AD15_IN | vin1a_d15 | - | - | - | - | - | - | - |
L5 | gpmc_ad2 | 2951 | 1296 | 3226 | 1209 | CFG_GPMC_AD2_IN | vin1a_d2 | - | - | - | - | - | - | - |
M1 | gpmc_ad3 | 2825 | 1154 | 3121 | 997 | CFG_GPMC_AD3_IN | vin1a_d3 | - | - | - | - | - | - | - |
L6 | gpmc_ad4 | 2927 | 1245 | 3246 | 1014 | CFG_GPMC_AD4_IN | vin1a_d4 | - | - | - | - | - | - | - |
L4 | gpmc_ad5 | 2923 | 1251 | 3217 | 1098 | CFG_GPMC_AD5_IN | vin1a_d5 | - | - | - | - | - | - | - |
L3 | gpmc_ad6 | 2958 | 1342 | 3238 | 1239 | CFG_GPMC_AD6_IN | vin1a_d6 | - | - | - | - | - | - | - |
L2 | gpmc_ad7 | 2900 | 1244 | 3174 | 1157 | CFG_GPMC_AD7_IN | vin1a_d7 | - | - | - | - | - | - | - |
L1 | gpmc_ad8 | 2845 | 1585 | 3125 | 1482 | CFG_GPMC_AD8_IN | vin1a_d8 | - | - | - | - | - | - | - |
K2 | gpmc_ad9 | 2779 | 1343 | 3086 | 1223 | CFG_GPMC_AD9_IN | vin1a_d9 | - | - | - | - | - | - | - |
N6 | gpmc_ben0 | 1555 | 0 | 1425 | 0 | CFG_GPMC_BEN0_IN | - | - | - | - | - | - | vin2b_de1 | vin1b_de1 |
M4 | gpmc_ben1 | 1501 | 0 | 1397 | 0 | CFG_GPMC_BEN1_IN | - | - | - | vin2b_clk1 | - | - | vin2b_fld1 | vin1b_fld1 |
P7 | gpmc_clk | 0 | 0 | 0 | 0 | CFG_GPMC_CLK_IN | - | - | - | vin2a_hsync0 | - | vin2a_de0 | vin2b_clk1 | vin1b_clk1 |
H6 | gpmc_cs1 | 1192 | 0 | 1102 | 0 | CFG_GPMC_CS1_IN | - | - | - | vin2a_de0 | - | - | vin2b_vsync1 | vin1b_vsync1 |
P1 | gpmc_cs3 | 1324 | 374 | 1466 | 353 | CFG_GPMC_CS3_IN | vin1a_clk0 | - | - | - | - | - | - | - |
D11 | vout1_clk | 1648 | 885 | 1762 | 928 | CFG_VOUT1_CLK_IN | - | vin2a_fld0 | vin1a_fld0 | vin1a_fld0 | - | - | - | - |
F11 | vout1_d0 | 2197 | 565 | 2734 | 215 | CFG_VOUT1_D0_IN | - | vin2a_d16 | vin1a_d16 | vin1a_d16 | - | - | - | - |
G10 | vout1_d1 | 2221 | 576 | 2750 | 230 | CFG_VOUT1_D1_IN | - | vin2a_d17 | vin1a_d17 | vin1a_d17 | - | - | - | - |
D7 | vout1_d10 | 1800 | 863 | 1910 | 916 | CFG_VOUT1_D10_IN | - | vin2a_d10 | vin1a_d10 | vin1a_d10 | - | - | - | - |
D8 | vout1_d11 | 1656 | 931 | 1780 | 945 | CFG_VOUT1_D11_IN | - | vin2a_d11 | vin1a_d11 | vin1a_d11 | - | - | - | - |
A5 | vout1_d12 | 1719 | 1086 | 1866 | 1041 | CFG_VOUT1_D12_IN | - | vin2a_d12 | vin1a_d12 | vin1a_d12 | - | - | - | - |
C6 | vout1_d13 | 1757 | 928 | 1851 | 1022 | CFG_VOUT1_D13_IN | - | vin2a_d13 | vin1a_d13 | vin1a_d13 | - | - | - | - |
C8 | vout1_d14 | 2279 | 345 | 2788 | 0 | CFG_VOUT1_D14_IN | - | vin2a_d14 | vin1a_d14 | vin1a_d14 | - | - | - | - |
C7 | vout1_d15 | 1810 | 874 | 2786 | 69 | CFG_VOUT1_D15_IN | - | vin2a_d15 | vin1a_d15 | vin1a_d15 | - | - | - | - |
B7 | vout1_d16 | 1763 | 774 | 1880 | 807 | CFG_VOUT1_D16_IN | - | vin2a_d0 | vin1a_d0 | vin1a_d0 | - | - | - | - |
B8 | vout1_d17 | 1695 | 788 | 1805 | 838 | CFG_VOUT1_D17_IN | - | vin2a_d1 | vin1a_d1 | vin1a_d1 | - | - | - | - |
A7 | vout1_d18 | 1777 | 590 | 1871 | 684 | CFG_VOUT1_D18_IN | - | vin2a_d2 | vin1a_d2 | vin1a_d2 | - | - | - | - |
A8 | vout1_d19 | 2047 | 22 | 2196 | 0 | CFG_VOUT1_D19_IN | - | vin2a_d3 | vin1a_d3 | vin1a_d3 | - | - | - | - |
F10 | vout1_d2 | 1809 | 941 | 2759 | 178 | CFG_VOUT1_D2_IN | - | vin2a_d18 | vin1a_d18 | vin1a_d18 | - | - | - | - |
C9 | vout1_d20 | 1676 | 944 | 1795 | 973 | CFG_VOUT1_D20_IN | - | vin2a_d4 | vin1a_d4 | vin1a_d4 | - | - | - | - |
A9 | vout1_d21 | 1712 | 688 | 1848 | 670 | CFG_VOUT1_D21_IN | - | vin2a_d5 | vin1a_d5 | vin1a_d5 | - | - | - | - |
B9 | vout1_d22 | 1698 | 557 | 2443 | 0 | CFG_VOUT1_D22_IN | - | vin2a_d6 | vin1a_d6 | vin1a_d6 | - | - | - | - |
A10 | vout1_d23 | 1627 | 1035 | 1726 | 1116 | CFG_VOUT1_D23_IN | - | vin2a_d7 | vin1a_d7 | vin1a_d7 | - | - | - | - |
G11 | vout1_d3 | 2427 | 429 | 2853 | 167 | CFG_VOUT1_D3_IN | - | vin2a_d19 | vin1a_d19 | vin1a_d19 | - | - | - | - |
E9 | vout1_d4 | 2351 | 412 | 2845 | 85 | CFG_VOUT1_D4_IN | - | vin2a_d20 | vin1a_d20 | vin1a_d20 | - | - | - | - |
F9 | vout1_d5 | 1634 | 983 | 1729 | 1076 | CFG_VOUT1_D5_IN | - | vin2a_d21 | vin1a_d21 | vin1a_d21 | - | - | - | - |
F8 | vout1_d6 | 1776 | 880 | 2736 | 107 | CFG_VOUT1_D6_IN | - | vin2a_d22 | vin1a_d22 | vin1a_d22 | - | - | - | - |
E7 | vout1_d7 | 2272 | 351 | 2757 | 53 | CFG_VOUT1_D7_IN | - | vin2a_d23 | vin1a_d23 | vin1a_d23 | - | - | - | - |
E8 | vout1_d8 | 1724 | 898 | 1819 | 990 | CFG_VOUT1_D8_IN | - | vin2a_d8 | vin1a_d8 | vin1a_d8 | - | - | - | - |
D9 | vout1_d9 | 2281 | 566 | 2804 | 195 | CFG_VOUT1_D9_IN | - | vin2a_d9 | vin1a_d9 | vin1a_d9 | - | - | - | - |
B10 | vout1_de | 1734 | 749 | 1828 | 842 | CFG_VOUT1_DE_IN | - | vin2a_de0 | vin1a_de0 | vin1a_de0 | - | - | - | - |
B11 | vout1_fld | 0 | 0 | 0 | 0 | CFG_VOUT1_FLD_IN | - | vin2a_clk0 | vin1a_clk0 | vin1a_clk0 | - | - | - | - |
C11 | vout1_hsync | 1634 | 606 | 2399 | 0 | CFG_VOUT1_HSYNC_IN | - | vin2a_hsync0 | vin1a_hsync0 | vin1a_hsync0 | - | - | - | - |
E11 | vout1_vsync | 1887 | 0 | 2068 | 0 | CFG_VOUT1_VSYNC_IN | - | vin2a_vsync0 | vin1a_vsync0 | vin1a_vsync0 | - | - | - | - |
Manual IO Timings Modes must be used to ensure some IO timings for VIP1. See Table 7-2Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 7-10Manual Functions Mapping for VIN1A (IOSET5/6) and VIN2A (IOSET7/8/9) for a definition of the Manual modes.
Table 7-10 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers.
BALL | BALL NAME | VIP_MANUAL8 | VIP_MANUAL13 | CFG REGISTER | MUXMODE | ||||||
---|---|---|---|---|---|---|---|---|---|---|---|
A_DELAY (ps) | G_DELAY (ps) | A_DELAY (ps) | G_DELAY (ps) | 3 | 4(1) | 4(1) | 5(1) | 5(1) | |||
R6 | gpmc_a0 | 1891 | 427 | 2176 | 0 | CFG_GPMC_A0_IN | - | vin2a_d0 | vin1a_d0 | - | - |
T9 | gpmc_a1 | 1713 | 513 | 2109 | 0 | CFG_GPMC_A1_IN | - | vin2a_d1 | vin1a_d1 | - | - |
P9 | gpmc_a11 | 1797 | 317 | 2036 | 0 | CFG_GPMC_A11_IN | - | vin2a_fld0 | vin1a_fld0 | - | - |
P4 | gpmc_a12 | 0 | 0 | 0 | 0 | CFG_GPMC_A12_IN | - | vin2a_clk0 | vin1a_clk0 | - | - |
R3 | gpmc_a13 | 1876 | 391 | 2144 | 0 | CFG_GPMC_A13_IN | - | vin2a_hsync0 | vin1a_hsync0 | - | - |
T2 | gpmc_a14 | 1720 | 756 | 2384 | 38 | CFG_GPMC_A14_IN | - | vin2a_vsync0 | vin1a_vsync0 | - | - |
U2 | gpmc_a15 | 1502 | 368 | 1804 | 0 | CFG_GPMC_A15_IN | - | vin2a_d8 | vin1a_d8 | - | - |
U1 | gpmc_a16 | 1651 | 355 | 1902 | 0 | CFG_GPMC_A16_IN | - | vin2a_d9 | vin1a_d9 | - | - |
P3 | gpmc_a17 | 1642 | 338 | 1862 | 0 | CFG_GPMC_A17_IN | - | vin2a_d10 | vin1a_d10 | - | - |
R2 | gpmc_a18 | 1612 | 0 | 1406 | 0 | CFG_GPMC_A18_IN | - | vin2a_d11 | vin1a_d11 | - | - |
K7 | gpmc_a19 | 1463 | 152 | 1418 | 0 | CFG_GPMC_A19_IN | - | vin2a_d12 | vin1a_d12 | - | - |
T6 | gpmc_a2 | 1789 | 646 | 2310 | 0 | CFG_GPMC_A2_IN | - | vin2a_d2 | vin1a_d2 | - | - |
M7 | gpmc_a20 | 1124 | 0 | 933 | 0 | CFG_GPMC_A20_IN | - | vin2a_d13 | vin1a_d13 | - | - |
J5 | gpmc_a21 | 1491 | 206 | 1483 | 0 | CFG_GPMC_A21_IN | - | vin2a_d14 | vin1a_d14 | - | - |
K6 | gpmc_a22 | 1218 | 245 | 1254 | 0 | CFG_GPMC_A22_IN | - | vin2a_d15 | vin1a_d15 | - | - |
J7 | gpmc_a23 | 1216 | 0 | 1021 | 0 | CFG_GPMC_A23_IN | - | vin2a_fld0 | vin1a_fld0 | - | - |
T7 | gpmc_a3 | 1789 | 766 | 2451 | 8 | CFG_GPMC_A3_IN | - | vin2a_d3 | vin1a_d3 | - | - |
P6 | gpmc_a4 | 1842 | 646 | 2329 | 0 | CFG_GPMC_A4_IN | - | vin2a_d4 | vin1a_d4 | - | - |
R9 | gpmc_a5 | 1778 | 556 | 2215 | 0 | CFG_GPMC_A5_IN | - | vin2a_d5 | vin1a_d5 | - | - |
R5 | gpmc_a6 | 1783 | 443 | 2088 | 0 | CFG_GPMC_A6_IN | - | vin2a_d6 | vin1a_d6 | - | - |
P5 | gpmc_a7 | 2207 | 370 | 2393 | 0 | CFG_GPMC_A7_IN | - | vin2a_d7 | vin1a_d7 | - | - |
N1 | gpmc_advn_ale | 1755 | 116 | 1745 | 0 | CFG_GPMC_ADVN_ALE_IN | - | vin2a_vsync0 | vin1a_vsync0 | - | - |
P7 | gpmc_clk | 1896 | 351 | 2152 | 0 | CFG_GPMC_CLK_IN | - | vin2a_hsync0 | vin1a_hsync0 | vin2a_de0 | vin1a_de0 |
H6 | gpmc_cs1 | 1337 | 74 | 1288 | 0 | CFG_GPMC_CS1_IN | - | vin2a_de0 | vin1a_de0 | - | - |
D11 | vout1_clk | 1939 | 332 | 2486 | 0 | CFG_VOUT1_CLK_IN | vin2a_fld0 | - | - | - | - |
F11 | vout1_d0 | 2140 | 647 | 2617 | 386 | CFG_VOUT1_D0_IN | vin2a_d16 | - | - | - | - |
G10 | vout1_d1 | 2104 | 615 | 2620 | 314 | CFG_VOUT1_D1_IN | vin2a_d17 | - | - | - | - |
D7 | vout1_d10 | 2139 | 406 | 2675 | 85 | CFG_VOUT1_D10_IN | vin2a_d10 | - | - | - | - |
D8 | vout1_d11 | 1944 | 534 | 2569 | 125 | CFG_VOUT1_D11_IN | vin2a_d11 | - | - | - | - |
A5 | vout1_d12 | 1966 | 659 | 2646 | 154 | CFG_VOUT1_D12_IN | vin2a_d12 | - | - | - | - |
C6 | vout1_d13 | 2048 | 447 | 2624 | 87 | CFG_VOUT1_D13_IN | vin2a_d13 | - | - | - | - |
C8 | vout1_d14 | 2222 | 548 | 2700 | 286 | CFG_VOUT1_D14_IN | vin2a_d14 | - | - | - | - |
C7 | vout1_d15 | 2072 | 443 | 2664 | 67 | CFG_VOUT1_D15_IN | vin2a_d15 | - | - | - | - |
B7 | vout1_d16 | 2044 | 455 | 2634 | 82 | CFG_VOUT1_D16_IN | vin2a_d0 | - | - | - | - |
B8 | vout1_d17 | 1971 | 246 | 2433 | 0 | CFG_VOUT1_D17_IN | vin2a_d1 | - | - | - | - |
A7 | vout1_d18 | 2104 | 120 | 2440 | 0 | CFG_VOUT1_D18_IN | vin2a_d2 | - | - | - | - |
A8 | vout1_d19 | 1888 | 0 | 2105 | 0 | CFG_VOUT1_D19_IN | vin2a_d3 | - | - | - | - |
F10 | vout1_d2 | 2170 | 237 | 2624 | 0 | CFG_VOUT1_D2_IN | vin2a_d18 | - | - | - | - |
C9 | vout1_d20 | 1942 | 512 | 2579 | 91 | CFG_VOUT1_D20_IN | vin2a_d4 | - | - | - | - |
A9 | vout1_d21 | 1997 | 141 | 2324 | 0 | CFG_VOUT1_D21_IN | vin2a_d5 | - | - | - | - |
B9 | vout1_d22 | 1949 | 0 | 2165 | 0 | CFG_VOUT1_D22_IN | vin2a_d6 | - | - | - | - |
A10 | vout1_d23 | 1871 | 704 | 2522 | 269 | CFG_VOUT1_D23_IN | vin2a_d7 | - | - | - | - |
G11 | vout1_d3 | 2319 | 417 | 2740 | 191 | CFG_VOUT1_D3_IN | vin2a_d19 | - | - | - | - |
E9 | vout1_d4 | 2300 | 369 | 2739 | 137 | CFG_VOUT1_D4_IN | vin2a_d20 | - | - | - | - |
F9 | vout1_d5 | 1923 | 579 | 2527 | 191 | CFG_VOUT1_D5_IN | vin2a_d21 | - | - | - | - |
F8 | vout1_d6 | 2148 | 396 | 2622 | 138 | CFG_VOUT1_D6_IN | vin2a_d22 | - | - | - | - |
E7 | vout1_d7 | 2212 | 335 | 2653 | 110 | CFG_VOUT1_D7_IN | vin2a_d23 | - | - | - | - |
E8 | vout1_d8 | 1962 | 573 | 2573 | 178 | CFG_VOUT1_D8_IN | vin2a_d8 | - | - | - | - |
D9 | vout1_d9 | 2312 | 335 | 2725 | 138 | CFG_VOUT1_D9_IN | vin2a_d9 | - | - | - | - |
B10 | vout1_de | 1973 | 414 | 2551 | 52 | CFG_VOUT1_DE_IN | vin2a_de0 | - | - | - | - |
B11 | vout1_fld | 0 | 0 | 0 | 0 | CFG_VOUT1_FLD_IN | vin2a_clk0 | - | - | - | - |
C11 | vout1_hsync | 1813 | 261 | 2277 | 0 | CFG_VOUT1_HSYNC_IN | vin2a_hsync0 | - | - | - | - |
E11 | vout1_vsync | 1665 | 0 | 1881 | 0 | CFG_VOUT1_VSYNC_IN | vin2a_vsync0 | - | - | - | - |
Manual IO Timings Modes must be used to ensure some IO timings for VIP1. See Table 7-2Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 7-11Manual Functions Mapping for VIN1B (IOSET6/7) for a definition of the Manual modes.
Table 7-11 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers.
BALL | BALL NAME | VIP_MANUAL9 | VIP_MANUAL14 | CFG REGISTER | MUXMODE | |||
---|---|---|---|---|---|---|---|---|
A_DELAY (ps) | G_DELAY (ps) | A_DELAY (ps) | G_DELAY (ps) | 5 | 6 | |||
R6 | gpmc_a0 | 1873 | 702 | 2202 | 441 | CFG_GPMC_A0_IN | - | vin1b_d0 |
T9 | gpmc_a1 | 1629 | 772 | 2057 | 413 | CFG_GPMC_A1_IN | - | vin1b_d1 |
N9 | gpmc_a10 | 0 | 0 | 0 | 0 | CFG_GPMC_A10_IN | - | vin1b_clk1 |
P9 | gpmc_a11 | 1851 | 1011 | 2126 | 856 | CFG_GPMC_A11_IN | - | vin1b_de1 |
P4 | gpmc_a12 | 2009 | 601 | 2289 | 327 | CFG_GPMC_A12_IN | - | vin1b_fld1 |
T6 | gpmc_a2 | 1734 | 898 | 2131 | 573 | CFG_GPMC_A2_IN | - | vin1b_d2 |
T7 | gpmc_a3 | 1757 | 1076 | 2106 | 812 | CFG_GPMC_A3_IN | - | vin1b_d3 |
P6 | gpmc_a4 | 1794 | 893 | 2164 | 559 | CFG_GPMC_A4_IN | - | vin1b_d4 |
R9 | gpmc_a5 | 1726 | 853 | 2120 | 523 | CFG_GPMC_A5_IN | - | vin1b_d5 |
R5 | gpmc_a6 | 1792 | 612 | 2153 | 338 | CFG_GPMC_A6_IN | - | vin1b_d6 |
P5 | gpmc_a7 | 2117 | 610 | 2389 | 304 | CFG_GPMC_A7_IN | - | vin1b_d7 |
N7 | gpmc_a8 | 1758 | 653 | 2140 | 308 | CFG_GPMC_A8_IN | - | vin1b_hsync1 |
R4 | gpmc_a9 | 1705 | 899 | 2067 | 646 | CFG_GPMC_A9_IN | - | vin1b_vsync1 |
U4 | mdio_d | 1945 | 671 | 2265 | 414 | CFG_MDIO_D_IN | vin1b_d0 | - |
V1 | mdio_mclk | 255 | 119 | 337 | 0 | CFG_MDIO_MCLK_IN | vin1b_clk1 | - |
U5 | rgmii0_rxc | 2057 | 909 | 2341 | 646 | CFG_RGMII0_RXC_IN | vin1b_d5 | - |
V5 | rgmii0_rxctl | 2121 | 1139 | 2323 | 988 | CFG_RGMII0_RXCTL_IN | vin1b_d6 | - |
W2 | rgmii0_rxd0 | 2070 | 655 | 2336 | 340 | CFG_RGMII0_RXD0_IN | vin1b_fld1 | - |
V4 | rgmii0_rxd3 | 2092 | 1357 | 2306 | 1216 | CFG_RGMII0_RXD3_IN | vin1b_d7 | - |
W9 | rgmii0_txc | 2088 | 1205 | 2328 | 1079 | CFG_RGMII0_TXC_IN | vin1b_d3 | - |
V9 | rgmii0_txctl | 2143 | 1383 | 2312 | 1311 | CFG_RGMII0_TXCTL_IN | vin1b_d4 | - |
V6 | rgmii0_txd1 | 2078 | 1189 | 2324 | 1065 | CFG_RGMII0_TXD1_IN | vin1b_vsync1 | - |
U7 | rgmii0_txd2 | 1928 | 1125 | 2306 | 763 | CFG_RGMII0_TXD2_IN | vin1b_hsync1 | - |
V7 | rgmii0_txd3 | 2255 | 971 | 2401 | 846 | CFG_RGMII0_TXD3_IN | vin1b_de1 | - |
V2 | uart3_rxd | 1829 | 747 | 2220 | 400 | CFG_UART3_RXD_IN | vin1b_d1 | - |
Y1 | uart3_txd | 2030 | 837 | 2324 | 568 | CFG_UART3_TXD_IN | vin1b_d2 | - |
Manual IO Timings Modes must be used to ensure some IO timings for VIP1. See Table 7-2Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 7-12Manual Functions Mapping for VIN1B (IOSET5) and VIN2B (IOSET2/11) for a definition of the Manual modes.
Table 7-12 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers.
BALL | BALL NAME | VIP_MANUAL10 | VIP_MANUAL11 | CFG REGISTER | MUXMODE | |||||
---|---|---|---|---|---|---|---|---|---|---|
A_DELAY (ps) | G_DELAY (ps) | A_DELAY (ps) | G_DELAY (ps) | 4(1) | 4(1) | 6(1) | 6(1) | |||
K7 | gpmc_a19 | 1600 | 943 | 2023 | 477 | CFG_GPMC_A19_IN | - | - | vin2b_d0 | vin1b_d0 |
M7 | gpmc_a20 | 1440 | 621 | 1875 | 136 | CFG_GPMC_A20_IN | - | - | vin2b_d1 | vin1b_d1 |
J5 | gpmc_a21 | 1602 | 1066 | 2021 | 604 | CFG_GPMC_A21_IN | - | - | vin2b_d2 | vin1b_d2 |
K6 | gpmc_a22 | 1395 | 983 | 1822 | 519 | CFG_GPMC_A22_IN | - | - | vin2b_d3 | vin1b_d3 |
J7 | gpmc_a23 | 1571 | 716 | 2045 | 200 | CFG_GPMC_A23_IN | - | - | vin2b_d4 | vin1b_d4 |
J4 | gpmc_a24 | 1463 | 832 | 1893 | 396 | CFG_GPMC_A24_IN | - | - | vin2b_d5 | vin1b_d5 |
J6 | gpmc_a25 | 1426 | 1166 | 1842 | 732 | CFG_GPMC_A25_IN | - | - | vin2b_d6 | vin1b_d6 |
H4 | gpmc_a26 | 1362 | 1094 | 1797 | 584 | CFG_GPMC_A26_IN | - | - | vin2b_d7 | vin1b_d7 |
H5 | gpmc_a27 | 1283 | 809 | 1760 | 338 | CFG_GPMC_A27_IN | - | - | vin2b_hsync1 | vin1b_hsync1 |
N6 | gpmc_ben0 | 1978 | 780 | 2327 | 389 | CFG_GPMC_BEN0_IN | - | - | vin2b_de1 | vin1b_de1 |
M4 | gpmc_ben1 | 0 | 0 | 0 | 0 | CFG_GPMC_BEN1_IN | vin2b_clk1 | vin1b_clk1 | vin2b_fld1 | vin1b_fld1 |
H6 | gpmc_cs1 | 1411 | 982 | 1857 | 536 | CFG_GPMC_CS1_IN | - | - | vin2b_vsync1 | vin1b_vsync1 |
Manual IO Timings Modes must be used to ensure some IO timings for VIP1. See Table 7-2Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 7-13Manual Functions Mapping for VIN1A (IOSET8/9/10) for a definition of the Manual modes.
Table 7-13 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers.
BALL | BALL NAME | VIP_MANUAL15 | VIP_MANUAL16 | CFG REGISTER | MUXMODE | |||
---|---|---|---|---|---|---|---|---|
A_DELAY (ps) | G_DELAY (ps) | A_DELAY (ps) | G_DELAY (ps) | 7 | 9 | |||
AC5 | gpio6_10 | 2131 | 2198 | 2170 | 2180 | CFG_GPIO6_10_IN | - | vin1a_clk0 |
AB4 | gpio6_11 | 3720 | 2732 | 4106 | 2448 | CFG_GPIO6_11_IN | - | vin1a_de0 |
C14 | mcasp1_aclkx | 2447 | 0 | 3042 | 0 | CFG_MCASP1_ACLKX_IN | vin1a_fld0 | - |
G12 | mcasp1_axr0 | 3061 | 0 | 3380 | 292 | CFG_MCASP1_AXR0_IN | vin1a_vsync0 | - |
F12 | mcasp1_axr1 | 3113 | 0 | 3396 | 304 | CFG_MCASP1_AXR1_IN | vin1a_hsync0 | - |
B13 | mcasp1_axr10 | 2803 | 0 | 3362 | 0 | CFG_MCASP1_AXR10_IN | vin1a_d13 | - |
A12 | mcasp1_axr11 | 3292 | 0 | 3357 | 546 | CFG_MCASP1_AXR11_IN | vin1a_d12 | - |
E14 | mcasp1_axr12 | 2854 | 0 | 3145 | 320 | CFG_MCASP1_AXR12_IN | vin1a_d11 | - |
A13 | mcasp1_axr13 | 2813 | 0 | 3229 | 196 | CFG_MCASP1_AXR13_IN | vin1a_d10 | - |
G14 | mcasp1_axr14 | 2471 | 0 | 3053 | 0 | CFG_MCASP1_AXR14_IN | vin1a_d9 | - |
F14 | mcasp1_axr15 | 2815 | 0 | 3225 | 201 | CFG_MCASP1_AXR15_IN | vin1a_d8 | - |
B12 | mcasp1_axr8 | 2965 | 0 | 3427 | 83 | CFG_MCASP1_AXR8_IN | vin1a_d15 | - |
A11 | mcasp1_axr9 | 3082 | 0 | 3253 | 440 | CFG_MCASP1_AXR9_IN | vin1a_d14 | - |
D14 | mcasp1_fsx | 2898 | 0 | 3368 | 139 | CFG_MCASP1_FSX_IN | vin1a_de0 | - |
A19 | mcasp2_aclkx | 2413 | 0 | 2972 | 0 | CFG_MCASP2_ACLKX_IN | vin1a_d7 | - |
C15 | mcasp2_axr2 | 2478 | 0 | 3062 | 0 | CFG_MCASP2_AXR2_IN | vin1a_d5 | - |
A16 | mcasp2_axr3 | 2806 | 0 | 3175 | 242 | CFG_MCASP2_AXR3_IN | vin1a_d4 | - |
A18 | mcasp2_fsx | 2861 | 78 | 2936 | 599 | CFG_MCASP2_FSX_IN | vin1a_d6 | - |
B18 | mcasp3_aclkx | 1583 | 0 | 1878 | 0 | CFG_MCASP3_ACLKX_IN | vin1a_d3 | - |
B19 | mcasp3_axr0 | 2873 | 0 | 3109 | 375 | CFG_MCASP3_AXR0_IN | vin1a_d1 | - |
C17 | mcasp3_axr1 | 1625 | 1400 | 2072 | 1023 | CFG_MCASP3_AXR1_IN | vin1a_d0 | vin1a_fld0 |
F15 | mcasp3_fsx | 2792 | 0 | 3146 | 257 | CFG_MCASP3_FSX_IN | vin1a_d2 | - |
C18 | mcasp4_aclkx | 1547 | 268 | 1776 | 0 | CFG_MCASP4_ACLKX_IN | - | vin1a_d15 |
G16 | mcasp4_axr0 | 2362 | 587 | 2815 | 193 | CFG_MCASP4_AXR0_IN | - | vin1a_d13 |
D17 | mcasp4_axr1 | 2326 | 667 | 2769 | 304 | CFG_MCASP4_AXR1_IN | - | vin1a_d12 |
A21 | mcasp4_fsx | 924 | 2573 | 1338 | 2219 | CFG_MCASP4_FSX_IN | - | vin1a_d14 |
AA3 | mcasp5_aclkx | 3731 | 2106 | 4130 | 1708 | CFG_MCASP5_ACLKX_IN | - | vin1a_d11 |
AB3 | mcasp5_axr0 | 3800 | 3013 | 4159 | 2776 | CFG_MCASP5_AXR0_IN | - | vin1a_d9 |
AA4 | mcasp5_axr1 | 3828 | 2951 | 4179 | 2733 | CFG_MCASP5_AXR1_IN | - | vin1a_d8 |
AB9 | mcasp5_fsx | 3675 | 2447 | 4074 | 2142 | CFG_MCASP5_FSX_IN | - | vin1a_d10 |
AD4 | mmc3_clk | 3907 | 2744 | 4260 | 2450 | CFG_MMC3_CLK_IN | - | vin1a_d7 |
AC4 | mmc3_cmd | 3892 | 2768 | 4242 | 2470 | CFG_MMC3_CMD_IN | - | vin1a_d6 |
AC7 | mmc3_dat0 | 3786 | 2765 | 4156 | 2522 | CFG_MMC3_DAT0_IN | - | vin1a_d5 |
AC6 | mmc3_dat1 | 3673 | 2961 | 4053 | 2667 | CFG_MMC3_DAT1_IN | - | vin1a_d4 |
AC9 | mmc3_dat2 | 3818 | 2447 | 4209 | 2096 | CFG_MMC3_DAT2_IN | - | vin1a_d3 |
AC3 | mmc3_dat3 | 3902 | 2903 | 4259 | 2672 | CFG_MMC3_DAT3_IN | - | vin1a_d2 |
AC8 | mmc3_dat4 | 3905 | 2622 | 4259 | 2342 | CFG_MMC3_DAT4_IN | - | vin1a_d1 |
AD6 | mmc3_dat5 | 3807 | 2824 | 4167 | 2595 | CFG_MMC3_DAT5_IN | - | vin1a_d0 |
AB8 | mmc3_dat6 | 3724 | 2818 | 4123 | 2491 | CFG_MMC3_DAT6_IN | - | vin1a_hsync0 |
AB5 | mmc3_dat7 | 3775 | 2481 | 4159 | 2161 | CFG_MMC3_DAT7_IN | - | vin1a_vsync0 |
D18 | xref_clk0 | 1971 | 0 | 2472 | 0 | CFG_XREF_CLK0_IN | vin1a_d0 | - |
E17 | xref_clk1 | 0 | 192 | 0 | 603 | CFG_XREF_CLK1_IN | vin1a_clk0 | - |