JAJSG74C February   2012  – September 2018 DS90C187

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      代表的なアプリケーション
      2.      代表的なアプリケーション
  4. 改訂履歴
  5. 概要(続き)
  6. Pin Configuration and Functions
    1.     DS90C187 Pin Descriptions — Serializer
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Recommended Input Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 AC Timing Diagrams
    9. 7.9 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Device Functional Modes
      1. 8.3.1  Device Configuration
      2. 8.3.2  Single Pixel Input / Single Pixel Output
      3. 8.3.3  Single Pixel Input / Dual Pixel Output
      4. 8.3.4  Dual Pixel Input / Dual Pixel Output
      5. 8.3.5  Pixel Clock Edge Select (RFB)
      6. 8.3.6  Power Management
      7. 8.3.7  Sleep Mode (PDB)
      8. 8.3.8  LVDS Outputs
      9. 8.3.9  18 bit / 24 bit Color Mode (18B)
      10. 8.3.10 LVCMOS Inputs
    4. 8.4 Programming
      1. 8.4.1 LVDS Interface / TFT Color Data Recommended Mapping
        1. 8.4.1.1 Color Mapping Information
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 LVDS Interconnect Guidelines
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Up Sequence
    2. 10.2 Power Supply Filtering
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Power Management

The DS90C187 has several features to assist with managing power consumption. The device can be configured through the MODE0 and MODE1 control pins to enable only the required number of LVDS drivers for each application. The 18B_MODE pin allows the DS90C187 to power down the unused LVDS driver(s) for RGB-666 (18 bit color) applications for an additional level of power management. If no clock is applied to the IN_CLK pin, the DS90C187 will enter a low power state. To place the DS90C187 in its lowest power state, the device can be powered down by driving the PDB pin to LOW.