JAJSOL1A April   2022  – July 2022 ESD341

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1.     Absolute Maximum Ratings
    2. 6.1 ESD Ratings—JEDEC Specification
    3. 6.2 ESD Ratings—IEC Specification
    4.     Recommended Operating Conditions
    5. 6.3 Thermal Information
    6. 6.4 Electrical Characteristics
    7. 6.5 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 IEC 61000-4-2 ESD Protection
      2. 7.3.2 IEC 61000-4-5 Surge Protection
      3. 7.3.3 IO Capacitance
      4. 7.3.4 DC Breakdown Voltage
      5. 7.3.5 Ultra Low Leakage Current
      6. 7.3.6 Low ESD Clamping Voltage
      7. 7.3.7 Supports High Speed Interfaces
      8. 7.3.8 Industrial Temperature Range
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Signal Range
        2. 8.2.2.2 Operating Frequency
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

パッケージ・オプション

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メカニカル・データ(パッケージ|ピン)
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サーマルパッド・メカニカル・データ
発注情報

Application Information

The ESD341 is a diode type TVS which provides a path to ground for dissipating ESD events on high-speed signal lines between a human interface connector and a system. As the current from ESD passes through the TVS, only a small voltage drop is present across the diode. This is the voltage presented to the protected IC. The low RDYN of the triggered TVS holds this voltage (VCLAMP) to a safe level for the protected IC.