JAJSGM7D December   2018  – April 2022 INA819

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Setting the Gain
        1. 8.3.1.1 Gain Drift
      2. 8.3.2 EMI Rejection
      3. 8.3.3 Input Common-Mode Range
      4. 8.3.4 Input Protection
      5. 8.3.5 Operating Voltage
      6. 8.3.6 Error Sources
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Reference Pin
      2. 9.1.2 Input Bias Current Return Path
    2. 9.2 Typical Applications
      1. 9.2.1 Three-Pin Programmable Logic Controller (PLC)
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Resistance Temperature Detector Interface
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 PSpice® for TI
        2. 12.1.1.2 TINA-TI™ Simulation Software (Free Download)
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 サポート・リソース
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Revision History

Changes from Revision C (June 2020) to Revision D (April 2022)

  • Changed input stage offset voltage specification for INA819DRG from 10 µV typical to 6 µV typical, and from 35 µV maximum to 30 µV maximum, in Typical Characteristics Go
  • Changed maximum input stage offset voltage vs temperature specification for INA819DRG from 0.4 µV/°C to 0.35 µV/°C in Typical Characteristics Go
  • Changed Figures 7-10 and 7-11 to correct units from nA to pA.Go
  • Changed input common-mode range calculator link from outdated Common-Mode Input Range Calculator for Instrumentation Amplifiers to Analog Engineers Calculator.Go

Changes from Revision B (July 2019) to Revision C (June 2020)

  • DRG (WSON) パッケージおよび関連する内容をデータシートに追加Go
  • Added row for thermal pad to Pin Functions table Go
  • Added bullet regarding exposed thermal pad to end of Layout Guidelines section Go

Changes from Revision A (May 2019) to Revision B (July 2019)

  • DGK (VSSOP) パッケージを事前情報 (プレビュー) から量産データ (アクティブ) に変更Go

Changes from Revision * (December 2018) to Revision A (April 2019)

  • 8 ピン DGK (VSSOP) 事前情報パッケージおよび関連する内容をデータシートに追加Go
  • アプリケーション」の箇条書きを変更Go