JAJSOW1G November   2014  – July 2022 ISO7821

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Dissipation Characteristics
    6. 6.6  Electrical Characteristics, 5 V
    7. 6.7  Electrical Characteristics, 3.3 V
    8. 6.8  Electrical Characteristics, 2.5 V
    9. 6.9  Switching Characteristics, 5 V
    10. 6.10 Switching Characteristics, 3.3 V
    11. 6.11 Switching Characteristics, 2.5 V
    12. 6.12 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 High Voltage Feature Description
        1. 8.3.1.1 Regulatory Information
        2. 8.3.1.2 Safety Limiting Values
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device I/O Schematics
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Electromagnetic Compatibility (EMC) Considerations
      3. 9.2.3 Application Performance Curve
        1.       Power Supply Recommendations
  10. 10Layout
    1. 10.1 PCB Material
    2. 10.2 Layout Guidelines
    3. 10.3 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Trademarks
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DWW|16
  • DW|16
サーマルパッド・メカニカル・データ
発注情報

6.10 Switching Characteristics, 3.3 V

VCC1 = VCC2 = 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
tPLH, tPHLPropagation delay timeSee Figure 7-1610.816ns
PWD(1)Pulse width distortion |tPHL – tPLH|0.74.7
tsk(pp) (2)Part-to-part skew time4.5ns
trOutput signal rise timeSee Figure 7-11.33
tfOutput signal fall time1.33
tPHZDisable propagation delay, high-to-high impedance output for ISO7821DWW and ISO7821FDWW See Figure 7-21732ns
tPLZDisable propagation delay, low-to-high impedance output for ISO7821DWW and ISO7821FDWW 1732ns
tPZHEnable propagation delay, high impedance-to-high output for ISO7821DWW1732ns
Enable propagation delay, high impedance-to-high output for ISO7821FDWW22.5μs
tPZLEnable propagation delay, high impedance-to-low output for ISO7821DWW22.5μs
Enable propagation delay, high impedance-to-low output for ISO7821FDWW1732ns
tfsDefault output delay time from input power lossMeasured from the time VCC goes below 1.7 V. See Figure 7-30.29μs
tieTime interval error216 - 1 PRBS data at 100 Mbps1ns
(1) Also known as Pulse Skew.
(2) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads.